Lines Matching +full:frame +full:- +full:inversion
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 /dts-v1/;
13 compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pcie0_refclk: pcie0-refclk {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <100000000>;
30 reg_pcie1: regulator-pcie {
31 compatible = "regulator-fixed";
32 pinctrl-names = "default";
33 pinctrl-0 = <&pinctrl_pcie1_reg>;
34 regulator-name = "MPCIE_3V3";
35 regulator-min-microvolt = <3300000>;
36 regulator-max-microvolt = <3300000>;
38 enable-active-high;
41 reg_usdhc2_vmmc: regulator-vsd-3v3 {
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_reg_usdhc2>;
44 compatible = "regulator-fixed";
45 regulator-name = "VSD_3V3";
46 regulator-min-microvolt = <3300000>;
47 regulator-max-microvolt = <3300000>;
49 off-on-delay-us = <20000>;
50 enable-active-high;
53 buck2_reg: regulator-buck2 {
54 pinctrl-names = "default";
55 pinctrl-0 = <&pinctrl_buck2>;
56 compatible = "regulator-gpio";
57 regulator-name = "vdd_arm";
58 regulator-min-microvolt = <900000>;
59 regulator-max-microvolt = <1000000>;
63 regulator-boot-on;
64 regulator-always-on;
67 ir-receiver {
68 compatible = "gpio-ir-receiver";
70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_ir>;
72 linux,autosuspend-period = <125>;
75 audio_codec_bt_sco: audio-codec-bt-sco {
76 compatible = "linux,bt-sco";
77 #sound-dai-cells = <1>;
80 wm8524: audio-codec {
81 #sound-dai-cells = <0>;
83 wlf,mute-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
86 sound-bt-sco {
87 compatible = "simple-audio-card";
88 simple-audio-card,name = "bt-sco-audio";
89 simple-audio-card,format = "dsp_a";
90 simple-audio-card,bitclock-inversion;
91 simple-audio-card,frame-master = <&btcpu>;
92 simple-audio-card,bitclock-master = <&btcpu>;
94 btcpu: simple-audio-card,cpu {
95 sound-dai = <&sai3>;
96 dai-tdm-slot-num = <2>;
97 dai-tdm-slot-width = <16>;
100 simple-audio-card,codec {
101 sound-dai = <&audio_codec_bt_sco 1>;
105 sound-wm8524 {
106 compatible = "simple-audio-card";
107 simple-audio-card,name = "wm8524-audio";
108 simple-audio-card,format = "i2s";
109 simple-audio-card,frame-master = <&cpudai>;
110 simple-audio-card,bitclock-master = <&cpudai>;
111 simple-audio-card,mclk-fs = <256>;
112 simple-audio-card,widgets =
115 simple-audio-card,routing =
119 cpudai: simple-audio-card,cpu {
120 sound-dai = <&sai2>;
121 system-clock-direction-out;
124 link_codec: simple-audio-card,codec {
125 sound-dai = <&wm8524>;
129 spdif_out: spdif-out {
130 compatible = "linux,spdif-dit";
131 #sound-dai-cells = <0>;
134 spdif_in: spdif-in {
135 compatible = "linux,spdif-dir";
136 #sound-dai-cells = <0>;
139 sound-spdif {
140 compatible = "fsl,imx-audio-spdif";
141 model = "imx-spdif";
142 audio-cpu = <&spdif1>;
143 audio-codec = <&spdif_out>, <&spdif_in>;
146 hdmi_arc_in: hdmi-arc-in {
147 compatible = "linux,spdif-dir";
148 #sound-dai-cells = <0>;
151 sound-hdmi-arc {
152 compatible = "fsl,imx-audio-spdif";
153 model = "imx-hdmi-arc";
154 audio-cpu = <&spdif2>;
155 audio-codec = <&hdmi_arc_in>;
160 cpu-supply = <&buck2_reg>;
164 cpu-supply = <&buck2_reg>;
168 cpu-supply = <&buck2_reg>;
172 cpu-supply = <&buck2_reg>;
176 operating-points-v2 = <&ddrc_opp_table>;
179 ddrc_opp_table: opp-table {
180 compatible = "operating-points-v2";
182 opp-25000000 {
183 opp-hz = /bits/ 64 <25000000>;
186 opp-100000000 {
187 opp-hz = /bits/ 64 <100000000>;
193 opp-166000000 {
194 opp-hz = /bits/ 64 <166935483>;
197 opp-800000000 {
198 opp-hz = /bits/ 64 <800000000>;
208 pinctrl-names = "default";
209 pinctrl-0 = <&pinctrl_fec1>;
210 phy-mode = "rgmii-id";
211 phy-handle = <ðphy0>;
212 fsl,magic-packet;
216 #address-cells = <1>;
217 #size-cells = <0>;
219 ethphy0: ethernet-phy@0 {
220 compatible = "ethernet-phy-ieee802.3-c22";
222 reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
223 reset-assert-us = <10000>;
224 qca,disable-smarteee;
225 vddio-supply = <&vddh>;
227 vddh: vddh-regulator {
234 pinctrl-names = "default";
235 pinctrl-0 = <&pinctrl_wifi_reset>;
237 wl-reg-on-hog {
238 gpio-hog;
240 output-high;
245 clock-frequency = <100000>;
246 pinctrl-names = "default";
247 pinctrl-0 = <&pinctrl_i2c1>;
256 regulator-min-microvolt = <825000>;
257 regulator-max-microvolt = <1100000>;
261 regulator-min-microvolt = <825000>;
262 regulator-max-microvolt = <1100000>;
266 regulator-min-microvolt = <1100000>;
267 regulator-max-microvolt = <1100000>;
268 regulator-always-on;
272 regulator-min-microvolt = <825000>;
273 regulator-max-microvolt = <1100000>;
274 regulator-always-on;
278 regulator-min-microvolt = <1800000>;
279 regulator-max-microvolt = <1800000>;
280 regulator-always-on;
284 regulator-min-microvolt = <5000000>;
285 regulator-max-microvolt = <5150000>;
289 regulator-min-microvolt = <1000000>;
290 regulator-max-microvolt = <3000000>;
291 regulator-always-on;
295 regulator-always-on;
299 regulator-min-microvolt = <800000>;
300 regulator-max-microvolt = <1550000>;
304 regulator-min-microvolt = <850000>;
305 regulator-max-microvolt = <975000>;
306 regulator-always-on;
310 regulator-min-microvolt = <1675000>;
311 regulator-max-microvolt = <1975000>;
312 regulator-always-on;
316 regulator-min-microvolt = <1625000>;
317 regulator-max-microvolt = <1875000>;
318 regulator-always-on;
322 regulator-min-microvolt = <3075000>;
323 regulator-max-microvolt = <3625000>;
324 regulator-always-on;
328 regulator-min-microvolt = <1800000>;
329 regulator-max-microvolt = <3300000>;
340 #address-cells = <1>;
341 #size-cells = <0>;
345 pinctrl-0 = <&pinctrl_mipi_dsi>;
346 pinctrl-names = "default";
349 reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
350 dsi-lanes = <4>;
354 remote-endpoint = <&mipi_dsi_out>;
363 remote-endpoint = <&panel_in>;
370 pinctrl-names = "default";
371 pinctrl-0 = <&pinctrl_pcie0>;
372 reset-gpio = <&gpio5 28 GPIO_ACTIVE_LOW>;
377 vph-supply = <&vgen5_reg>;
378 supports-clkreq;
383 pinctrl-names = "default";
384 pinctrl-0 = <&pinctrl_pcie0>;
393 pinctrl-names = "default";
394 pinctrl-0 = <&pinctrl_pcie1>;
395 reset-gpio = <&gpio5 12 GPIO_ACTIVE_LOW>;
400 vpcie-supply = <®_pcie1>;
401 vpcie3v3aux-supply = <®_pcie1>;
402 vph-supply = <&vgen5_reg>;
403 supports-clkreq;
408 pinctrl-names = "default";
409 pinctrl-0 = <&pinctrl_pcie1>;
418 power-supply = <&sw1a_reg>;
422 power-supply = <&sw1c_reg>;
426 pinctrl-names = "default";
427 pinctrl-0 = <&pinctrl_qspi>;
432 #address-cells = <1>;
433 #size-cells = <1>;
434 compatible = "micron,n25q256a", "jedec,spi-nor";
435 spi-max-frequency = <29000000>;
436 spi-tx-bus-width = <1>;
437 spi-rx-bus-width = <4>;
442 pinctrl-names = "default";
443 pinctrl-0 = <&pinctrl_sai2>;
444 assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1_BYPASS>, <&clk IMX8MQ_CLK_SAI2>;
445 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL1_OUT>;
446 assigned-clock-rates = <0>, <24576000>;
451 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
456 #sound-dai-cells = <0>;
457 pinctrl-names = "default";
458 pinctrl-0 = <&pinctrl_sai3>;
459 assigned-clocks = <&clk IMX8MQ_CLK_SAI3>;
460 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
461 assigned-clock-rates = <24576000>;
470 pinctrl-names = "default";
471 pinctrl-0 = <&pinctrl_spdif1>;
472 assigned-clocks = <&clk IMX8MQ_CLK_SPDIF1>;
473 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
474 assigned-clock-rates = <24576000>;
479 assigned-clocks = <&clk IMX8MQ_CLK_SPDIF2>;
480 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
481 assigned-clock-rates = <24576000>;
486 pinctrl-names = "default";
487 pinctrl-0 = <&pinctrl_uart1>;
501 assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
502 assigned-clock-rates = <400000000>;
503 pinctrl-names = "default", "state_100mhz", "state_200mhz";
504 pinctrl-0 = <&pinctrl_usdhc1>;
505 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
506 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
507 vqmmc-supply = <&sw4_reg>;
508 bus-width = <8>;
509 non-removable;
510 no-sd;
511 no-sdio;
516 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
517 assigned-clock-rates = <200000000>;
518 pinctrl-names = "default", "state_100mhz", "state_200mhz";
519 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
520 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
521 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
522 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
523 vmmc-supply = <®_usdhc2_vmmc>;
528 pinctrl-names = "default";
529 pinctrl-0 = <&pinctrl_wdog>;
530 fsl,ext-reset-output;
667 pinctrl_usdhc1_100mhz: usdhc1-100grp {
684 pinctrl_usdhc1_200mhz: usdhc1-200grp {
719 pinctrl_usdhc2_100mhz: usdhc2-100grp {
731 pinctrl_usdhc2_200mhz: usdhc2-200grp {