Lines Matching +full:leds +full:- +full:pca9532

1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 #include <dt-bindings/leds/leds-pca9532.h>
11 #include <dt-bindings/pwm/pwm.h>
12 #include "imx8mp-phycore-som.dtsi"
15 model = "PHYTEC phyBOARD-Pollux i.MX8MP";
16 compatible = "phytec,imx8mp-phyboard-pollux-rdk",
17 "phytec,imx8mp-phycore-som", "fsl,imx8mp";
20 stdout-path = &uart1;
24 compatible = "pwm-backlight";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_lvds1>;
27 brightness-levels = <0 4 8 16 32 64 128 255>;
28 default-brightness-level = <11>;
29 enable-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
30 num-interpolated-steps = <2>;
31 power-supply = <&reg_lvds1_reg_en>;
35 panel1_lvds: panel-lvds {
38 power-supply = <&reg_vcc_3v3_sw>;
42 remote-endpoint = <&ldb_lvds_ch1>;
47 reg_vcc_5v_sw: regulator-vcc-5v-sw {
48 compatible = "regulator-fixed";
49 regulator-always-on;
50 regulator-boot-on;
51 regulator-max-microvolt = <5000000>;
52 regulator-min-microvolt = <5000000>;
53 regulator-name = "VCC_5V_SW";
56 reg_can1_stby: regulator-can1-stby {
57 compatible = "regulator-fixed";
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_flexcan1_reg>;
61 regulator-max-microvolt = <3300000>;
62 regulator-min-microvolt = <3300000>;
63 regulator-name = "can1-stby";
66 reg_can2_stby: regulator-can2-stby {
67 compatible = "regulator-fixed";
68 pinctrl-names = "default";
69 pinctrl-0 = <&pinctrl_flexcan2_reg>;
71 regulator-max-microvolt = <3300000>;
72 regulator-min-microvolt = <3300000>;
73 regulator-name = "can2-stby";
76 reg_lvds1_reg_en: regulator-lvds1 {
77 compatible = "regulator-fixed";
78 enable-active-high;
80 regulator-max-microvolt = <1200000>;
81 regulator-min-microvolt = <1200000>;
82 regulator-name = "lvds1_reg_en";
85 reg_usb1_vbus: regulator-usb1-vbus {
86 compatible = "regulator-fixed";
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_usb1_vbus>;
90 regulator-max-microvolt = <5000000>;
91 regulator-min-microvolt = <5000000>;
92 regulator-name = "usb1_host_vbus";
95 reg_usdhc2_vmmc: regulator-usdhc2 {
96 compatible = "regulator-fixed";
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
99 regulator-name = "VSD_3V3";
100 regulator-min-microvolt = <3300000>;
101 regulator-max-microvolt = <3300000>;
103 enable-active-high;
104 startup-delay-us = <100>;
105 off-on-delay-us = <12000>;
108 reg_vcc_3v3_sw: regulator-vcc-3v3-sw {
109 compatible = "regulator-fixed";
110 regulator-name = "VCC_3V3_SW";
111 regulator-min-microvolt = <3300000>;
112 regulator-max-microvolt = <3300000>;
118 #address-cells = <1>;
119 #size-cells = <0>;
120 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
121 pinctrl-names = "default";
122 pinctrl-0 = <&pinctrl_ecspi1>;
126 compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
128 spi-max-frequency = <38000000>;
133 pinctrl-names = "default";
134 pinctrl-0 = <&pinctrl_eqos>;
135 phy-mode = "rgmii-id";
136 phy-handle = <&ethphy0>;
140 compatible = "snps,dwmac-mdio";
141 #address-cells = <1>;
142 #size-cells = <0>;
144 ethphy0: ethernet-phy@1 {
145 compatible = "ethernet-phy-ieee802.3-c22";
147 ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
148 ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
149 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
150 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
151 enet-phy-lane-no-swap;
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_flexcan1>;
160 xceiver-supply = <&reg_can1_stby>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_flexcan2>;
167 xceiver-supply = <&reg_can2_stby>;
172 clock-frequency = <400000>;
173 pinctrl-names = "default", "gpio";
174 pinctrl-0 = <&pinctrl_i2c2>;
175 pinctrl-1 = <&pinctrl_i2c2_gpio>;
176 sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
177 scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
184 vcc-supply = <&reg_vcc_3v3_sw>;
187 leds@62 {
191 led-1 {
195 led-2 {
199 led-3 {
215 remote-endpoint = <&panel1_in>;
228 assigned-clock-rates = <500000000>, <200000000>,
239 clock-names = "ref";
240 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
241 fsl,clkreq-unsupported;
247 pinctrl-names = "default";
248 pinctrl-0 = <&pinctrl_pcie0>;
249 reset-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
250 vpcie-supply = <&reg_vcc_3v3_sw>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_pwm3>;
261 pinctrl-names = "default";
262 pinctrl-0 = <&pinctrl_rtc>;
263 interrupt-parent = <&gpio4>;
265 aux-voltage-chargeable = <1>;
266 wakeup-source;
267 trickle-resistor-ohms = <3000>;
272 pinctrl-names = "default";
273 pinctrl-0 = <&pinctrl_uart1>;
277 /* USB1 Host mode Type-A */
279 vbus-supply = <&reg_usb1_vbus>;
292 /* USB2 4-port USB3.0 HUB */
294 vbus-supply = <&reg_vcc_5v_sw>;
299 fsl,permanently-attached;
300 fsl,disable-port-power-control;
311 assigned-clocks = <&clk IMX8MP_CLK_UART2>;
312 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
313 pinctrl-names = "default";
314 pinctrl-0 = <&pinctrl_uart2>;
315 uart-has-rtscts;
319 /* SD-Card */
321 assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
322 assigned-clock-rates = <200000000>;
323 pinctrl-names = "default", "state_100mhz", "state_200mhz";
324 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_pins>;
325 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_pins>;
326 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_pins>;
327 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
328 disable-wp;
329 vmmc-supply = <&reg_usdhc2_vmmc>;
330 vqmmc-supply = <&ldo5>;
331 bus-width = <4>;
336 gpio-line-names = "", "", "X_PMIC_WDOG_B", "",
342 gpio-line-names = "", "", "", "",
349 gpio-line-names = "", "", "", "",
356 gpio-line-names = "", "", "", "",
487 pinctrl_usdhc2_pins: usdhc2-gpiogrp {
505 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
517 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {