Lines Matching +full:0 +full:x90

26 		pinctrl-0 = <&pinctrl_lvds1>;
27 brightness-levels = <0 4 8 16 32 64 128 255>;
32 pwms = <&pwm3 0 50000 0>;
59 pinctrl-0 = <&pinctrl_flexcan1_reg>;
69 pinctrl-0 = <&pinctrl_flexcan2_reg>;
88 pinctrl-0 = <&pinctrl_usb1_vbus>;
98 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
119 #size-cells = <0>;
122 pinctrl-0 = <&pinctrl_ecspi1>;
125 tpm: tpm@0 {
127 reg = <0>;
134 pinctrl-0 = <&pinctrl_eqos>;
142 #size-cells = <0>;
146 reg = <0x1>;
159 pinctrl-0 = <&pinctrl_flexcan1>;
166 pinctrl-0 = <&pinctrl_flexcan2>;
174 pinctrl-0 = <&pinctrl_i2c2>;
182 reg = <0x51>;
189 reg = <0x62>;
229 <0>, <0>, <500000000>,
248 pinctrl-0 = <&pinctrl_pcie0>;
257 pinctrl-0 = <&pinctrl_pwm3>;
262 pinctrl-0 = <&pinctrl_rtc>;
273 pinctrl-0 = <&pinctrl_uart1>;
292 /* USB2 4-port USB3.0 HUB */
314 pinctrl-0 = <&pinctrl_uart2>;
324 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_pins>;
365 MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x80
366 MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x80
367 MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x80
368 MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x00
374 MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2
375 MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2
376 MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90
377 MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90
378 MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90
379 MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90
380 MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90
381 MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90
382 MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x12
383 MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x12
384 MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x12
385 MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x12
386 MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x12
387 MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x12
388 MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20 0x10
394 MX8MP_IOMUXC_SAI5_RXD2__CAN1_RX 0x154
395 MX8MP_IOMUXC_SAI5_RXD1__CAN1_TX 0x154
401 MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX 0x154
402 MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX 0x154
408 MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20 0x154
414 MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x154
420 MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
421 MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
427 MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16 0x1e2
428 MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0x1e2
434 MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 0x12
440 MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08 0x40
441 MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x60
442 MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11 0x60 /* open drain, pull up */
443 MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x40
449 MX8MP_IOMUXC_SPDIF_TX__PWM3_OUT 0x12
455 MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
461 MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x1C0
467 MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
468 MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
474 MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x10
480 MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140
481 MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140
482 MX8MP_IOMUXC_SAI3_RXC__UART2_DCE_CTS 0x140
483 MX8MP_IOMUXC_SAI3_RXD__UART2_DCE_RTS 0x140
489 MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x40
495 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
496 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
497 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
498 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
499 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
500 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
501 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
507 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
508 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
509 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
510 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
511 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
512 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
513 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
519 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
520 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
521 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
522 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
523 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
524 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
525 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0