Lines Matching +full:0 +full:x90

28 		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
42 pinctrl-0 = <&pinctrl_usb0hub_sel>;
54 reg = <0x27>;
59 pinctrl-0 = <&pinctrl_expander2>;
91 fsl,pins = <MX8MN_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x00000146>,
92 <MX8MN_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x00000146>,
93 <MX8MN_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x00000146>,
94 <MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x00000146>;
98 fsl,pins = <MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x00000146>,
99 <MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x00000146>,
100 <MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x00000146>,
101 <MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x00000146>;
105 fsl,pins = <MX8MN_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x94>;
109 fsl,pins = <MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x40000002>,
110 <MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x40000002>,
111 <MX8MN_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x14>,
112 <MX8MN_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x14>,
113 <MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x14>,
114 <MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x14>,
115 <MX8MN_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x90>,
116 <MX8MN_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x90>,
117 <MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x90>,
118 <MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x90>,
119 <MX8MN_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x14>,
120 <MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x90>,
121 <MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x90>,
122 <MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x14>;
126 fsl,pins = <MX8MN_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x84>,
127 <MX8MN_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x84>,
128 <MX8MN_IOMUXC_SD1_CLK_GPIO2_IO0 0x84>;
132 fsl,pins = <MX8MN_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x84>,
133 <MX8MN_IOMUXC_NAND_DQS_GPIO3_IO14 0x84>;
137 fsl,pins = <MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001C4>,
138 <MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001C4>;
142 fsl,pins = <MX8MN_IOMUXC_I2C2_SCL_GPIO5_IO16 0x400001C4>,
143 <MX8MN_IOMUXC_I2C2_SDA_GPIO5_IO17 0x400001C4>;
147 fsl,pins = <MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001C4>,
148 <MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001C4>;
152 fsl,pins = <MX8MN_IOMUXC_I2C3_SCL_GPIO5_IO18 0x400001C4>,
153 <MX8MN_IOMUXC_I2C3_SDA_GPIO5_IO19 0x400001C4>;
157 fsl,pins = <MX8MN_IOMUXC_GPIO1_IO14_PWM3_OUT 0x14>;
161 fsl,pins = <MX8MN_IOMUXC_GPIO1_IO15_PWM4_OUT 0x14>;
165 fsl,pins = <MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0x94>,
166 <MX8MN_IOMUXC_SAI3_RXC_SAI3_RX_BCLK 0x94>,
167 <MX8MN_IOMUXC_SAI3_RXFS_SAI3_RX_SYNC 0x94>,
168 <MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0x94>,
169 <MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0x94>,
170 <MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0x94>,
171 <MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0x94>;
175 fsl,pins = <MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x16>,
176 <MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x16>;
180 fsl,pins = <MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x16>,
181 <MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x16>;
185 fsl,pins = <MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0x16>,
186 <MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0x16>;
190 fsl,pins = <MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x16>,
191 <MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x16>;
196 fsl,pins = <MX8MN_IOMUXC_SD1_CMD_GPIO2_IO1 0x84>;
200 fsl,pins = <MX8MN_IOMUXC_GPIO1_IO12_USB1_OTG_PWR 0x84>,
201 <MX8MN_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x84>;
205 fsl,pins = <MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x1d4>,
206 <MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4>,
207 <MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4>,
208 <MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4>,
209 <MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4>,
210 <MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4>,
211 <MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x84>;
215 fsl,pins = <MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x1d4>,
216 <MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4>,
217 <MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4>,
218 <MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4>,
219 <MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4>,
220 <MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4>,
221 <MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x84>;
225 fsl,pins = <MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x1d4>,
226 <MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4>,
227 <MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4>,
228 <MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4>,
229 <MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4>,
230 <MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4>,
231 <MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x84>;
235 fsl,pins = <MX8MN_IOMUXC_SD2_CD_B_GPIO2_IO12 0x84>;