Lines Matching +full:mac +full:- +full:divider

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gateworks,imx8mm-gw7904", "fsl,imx8mm";
25 stdout-path = &uart2;
33 gpio-keys {
34 compatible = "gpio-keys";
36 key-0 {
42 key-1 {
45 interrupt-parent = <&gsc>;
49 key-2 {
52 interrupt-parent = <&gsc>;
56 key-3 {
59 interrupt-parent = <&gsc>;
63 key-4 {
66 interrupt-parent = <&gsc>;
71 led-controller {
72 compatible = "gpio-leds";
73 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_gpio_leds>;
76 led-0 {
81 default-state = "off";
84 led-1 {
89 default-state = "off";
92 led-2 {
97 default-state = "off";
100 led-3 {
105 default-state = "off";
108 led-4 {
113 default-state = "off";
116 led-5 {
121 default-state = "off";
124 led-6 {
129 default-state = "off";
132 led-7 {
137 default-state = "off";
140 led-8 {
145 default-state = "off";
148 led-9 {
153 default-state = "off";
156 led-10 {
161 default-state = "off";
164 led-11 {
169 default-state = "off";
172 led-12 {
177 default-state = "off";
180 led-13 {
185 default-state = "off";
188 led-14 {
193 default-state = "off";
196 led-15 {
201 default-state = "off";
204 led-16 {
209 default-state = "off";
212 led-17 {
217 default-state = "off";
220 led-18 {
225 default-state = "off";
228 led-19 {
233 default-state = "off";
237 pcie0_refclk: pcie0-refclk {
238 compatible = "fixed-clock";
239 #clock-cells = <0>;
240 clock-frequency = <100000000>;
243 reg_3p3v: regulator-3p3v {
244 compatible = "regulator-fixed";
245 regulator-name = "3P3V";
246 regulator-min-microvolt = <3300000>;
247 regulator-max-microvolt = <3300000>;
248 regulator-always-on;
253 cpu-supply = <&buck2>;
257 cpu-supply = <&buck2>;
261 cpu-supply = <&buck2>;
265 cpu-supply = <&buck2>;
269 operating-points-v2 = <&ddrc_opp_table>;
271 ddrc_opp_table: opp-table {
272 compatible = "operating-points-v2";
274 opp-25000000 {
275 opp-hz = /bits/ 64 <25000000>;
278 opp-100000000 {
279 opp-hz = /bits/ 64 <100000000>;
282 opp-750000000 {
283 opp-hz = /bits/ 64 <750000000>;
289 pinctrl-names = "default";
290 pinctrl-0 = <&pinctrl_fec1>;
291 phy-mode = "rgmii-id";
292 phy-handle = <&ethphy0>;
293 local-mac-address = [00 00 00 00 00 00];
297 #address-cells = <1>;
298 #size-cells = <0>;
300 ethphy0: ethernet-phy@0 {
301 compatible = "ethernet-phy-ieee802.3-c22";
308 gpio-line-names = "", "", "", "", "", "", "", "",
315 gpio-line-names = "", "", "", "", "", "", "", "",
322 clock-frequency = <100000>;
323 pinctrl-names = "default", "gpio";
324 pinctrl-0 = <&pinctrl_i2c1>;
325 pinctrl-1 = <&pinctrl_i2c1_gpio>;
326 scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
327 sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
333 pinctrl-0 = <&pinctrl_gsc>;
334 interrupt-parent = <&gpio4>;
336 interrupt-controller;
337 #interrupt-cells = <1>;
338 #address-cells = <1>;
339 #size-cells = <0>;
342 compatible = "gw,gsc-adc";
343 #address-cells = <1>;
344 #size-cells = <0>;
356 gw,voltage-divider-ohms = <22100 1000>;
357 gw,voltage-offset-microvolt = <700000>;
364 gw,voltage-divider-ohms = <10000 10000>;
371 gw,voltage-divider-ohms = <10000 10000>;
408 gw,voltage-divider-ohms = <10000 10000>;
416 gpio-controller;
417 #gpio-cells = <2>;
418 interrupt-parent = <&gsc>;
453 clock-frequency = <400000>;
454 pinctrl-names = "default", "gpio";
455 pinctrl-0 = <&pinctrl_i2c2>;
456 pinctrl-1 = <&pinctrl_i2c2_gpio>;
457 scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
458 sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
464 pinctrl-names = "default";
465 pinctrl-0 = <&pinctrl_pmic>;
466 interrupt-parent = <&gpio3>;
468 rohm,reset-snvs-powered;
469 #clock-cells = <0>;
471 clock-output-names = "clk-32k-out";
474 /* vdd_soc: 0.805-0.900V (typ=0.8V) */
476 regulator-name = "buck1";
477 regulator-min-microvolt = <700000>;
478 regulator-max-microvolt = <1300000>;
479 regulator-boot-on;
480 regulator-always-on;
481 regulator-ramp-delay = <1250>;
484 /* vdd_arm: 0.805-1.0V (typ=0.9V) */
486 regulator-name = "buck2";
487 regulator-min-microvolt = <700000>;
488 regulator-max-microvolt = <1300000>;
489 regulator-boot-on;
490 regulator-always-on;
491 regulator-ramp-delay = <1250>;
492 rohm,dvs-run-voltage = <1000000>;
493 rohm,dvs-idle-voltage = <900000>;
496 /* vdd_0p9: 0.805-1.0V (typ=0.9V) */
498 regulator-name = "buck3";
499 regulator-min-microvolt = <700000>;
500 regulator-max-microvolt = <1350000>;
501 regulator-boot-on;
502 regulator-always-on;
507 regulator-name = "buck4";
508 regulator-min-microvolt = <3000000>;
509 regulator-max-microvolt = <3300000>;
510 regulator-boot-on;
511 regulator-always-on;
516 regulator-name = "buck5";
517 regulator-min-microvolt = <1605000>;
518 regulator-max-microvolt = <1995000>;
519 regulator-boot-on;
520 regulator-always-on;
525 regulator-name = "buck6";
526 regulator-min-microvolt = <800000>;
527 regulator-max-microvolt = <1400000>;
528 regulator-boot-on;
529 regulator-always-on;
534 regulator-name = "ldo1";
535 regulator-min-microvolt = <1600000>;
536 regulator-max-microvolt = <1900000>;
537 regulator-boot-on;
538 regulator-always-on;
543 regulator-name = "ldo2";
544 regulator-min-microvolt = <800000>;
545 regulator-max-microvolt = <900000>;
546 regulator-boot-on;
547 regulator-always-on;
552 regulator-name = "ldo3";
553 regulator-min-microvolt = <1800000>;
554 regulator-max-microvolt = <3300000>;
555 regulator-boot-on;
556 regulator-always-on;
560 regulator-name = "ldo4";
561 regulator-min-microvolt = <900000>;
562 regulator-max-microvolt = <1800000>;
563 regulator-boot-on;
564 regulator-always-on;
568 regulator-name = "ldo6";
569 regulator-min-microvolt = <900000>;
570 regulator-max-microvolt = <1800000>;
571 regulator-boot-on;
572 regulator-always-on;
579 clock-frequency = <400000>;
580 pinctrl-names = "default", "gpio";
581 pinctrl-0 = <&pinctrl_i2c3>;
582 pinctrl-1 = <&pinctrl_i2c3_gpio>;
583 scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
584 sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
588 pinctrl-names = "default";
589 pinctrl-0 = <&pinctrl_accel>;
592 st,drdy-int-pin = <1>;
593 interrupt-parent = <&gpio1>;
599 clock-frequency = <400000>;
600 pinctrl-names = "default", "gpio";
601 pinctrl-0 = <&pinctrl_i2c4>;
602 pinctrl-1 = <&pinctrl_i2c4_gpio>;
603 scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
604 sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
610 gpio-controller;
611 #gpio-cells = <2>;
616 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
617 fsl,clkreq-unsupported;
619 clock-names = "ref";
624 pinctrl-names = "default";
625 pinctrl-0 = <&pinctrl_pcie0>;
626 reset-gpio = <&gpio5 11 GPIO_ACTIVE_LOW>;
629 assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
631 assigned-clock-rates = <10000000>, <250000000>;
632 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
645 /* off-board RS232 */
647 pinctrl-names = "default";
648 pinctrl-0 = <&pinctrl_uart1>;
649 cts-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>;
650 rts-gpios = <&gpio5 27 GPIO_ACTIVE_LOW>;
656 pinctrl-names = "default";
657 pinctrl-0 = <&pinctrl_uart2>;
663 disable-over-current;
669 pinctrl-names = "default", "state_100mhz", "state_200mhz";
670 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
671 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
672 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
673 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
674 bus-width = <4>;
675 vmmc-supply = <&reg_3p3v>;
681 pinctrl-names = "default", "state_100mhz", "state_200mhz";
682 pinctrl-0 = <&pinctrl_usdhc3>;
683 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
684 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
685 bus-width = <8>;
686 non-removable;
691 pinctrl-names = "default";
692 pinctrl-0 = <&pinctrl_wdog>;
693 fsl,ext-reset-output;
698 pinctrl-names = "default";
699 pinctrl-0 = <&pinctrl_hog>;
845 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
856 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
867 pinctrl_usdhc2_gpio: usdhc2-gpiogrp {
890 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
906 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {