Lines Matching +full:mac +full:- +full:divider
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-imx8-pcie.h>
18 compatible = "gw,imx8mm-gw7902", "fsl,imx8mm";
29 stdout-path = &uart2;
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
40 clock-frequency = <20000000>;
41 clock-output-names = "can20m";
44 gpio-keys {
45 compatible = "gpio-keys";
47 key-user-pb {
53 key-user-pb1x {
56 interrupt-parent = <&gsc>;
60 key-erased {
63 interrupt-parent = <&gsc>;
67 key-eeprom-wp {
70 interrupt-parent = <&gsc>;
74 key-tamper {
77 interrupt-parent = <&gsc>;
81 switch-hold {
84 interrupt-parent = <&gsc>;
89 led-controller {
90 compatible = "gpio-leds";
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_gpio_leds>;
94 led-0 {
99 default-state = "off";
102 led-1 {
107 default-state = "off";
110 led-2 {
115 default-state = "off";
118 led-3 {
123 default-state = "off";
126 led-4 {
131 default-state = "off";
135 pcie0_refclk: pcie0-refclk {
136 compatible = "fixed-clock";
137 #clock-cells = <0>;
138 clock-frequency = <100000000>;
142 compatible = "pps-gpio";
143 pinctrl-names = "default";
144 pinctrl-0 = <&pinctrl_pps>;
149 reg_3p3v: regulator-3p3v {
150 compatible = "regulator-fixed";
151 regulator-name = "3P3V";
152 regulator-min-microvolt = <3300000>;
153 regulator-max-microvolt = <3300000>;
154 regulator-always-on;
157 reg_usb1_vbus: regulator-usb1 {
158 compatible = "regulator-fixed";
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_reg_usb1>;
161 regulator-name = "usb_usb1_vbus";
163 enable-active-high;
164 regulator-min-microvolt = <5000000>;
165 regulator-max-microvolt = <5000000>;
168 reg_wifi: regulator-wifi {
169 compatible = "regulator-fixed";
170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_reg_wl>;
172 regulator-name = "wifi";
174 enable-active-high;
175 startup-delay-us = <100>;
176 regulator-min-microvolt = <3300000>;
177 regulator-max-microvolt = <3300000>;
182 cpu-supply = <&buck2>;
186 cpu-supply = <&buck2>;
190 cpu-supply = <&buck2>;
194 cpu-supply = <&buck2>;
198 operating-points-v2 = <&ddrc_opp_table>;
200 ddrc_opp_table: opp-table {
201 compatible = "operating-points-v2";
203 opp-25000000 {
204 opp-hz = /bits/ 64 <25000000>;
207 opp-100000000 {
208 opp-hz = /bits/ 64 <100000000>;
211 opp-750000000 {
212 opp-hz = /bits/ 64 <750000000>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_spi1>;
220 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
227 interrupt-parent = <&gpio2>;
229 spi-max-frequency = <10000000>;
233 /* off-board header */
235 pinctrl-names = "default";
236 pinctrl-0 = <&pinctrl_spi2>;
237 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
242 pinctrl-names = "default";
243 pinctrl-0 = <&pinctrl_fec1>;
244 phy-mode = "rgmii-id";
245 phy-handle = <ðphy0>;
246 local-mac-address = [00 00 00 00 00 00];
250 #address-cells = <1>;
251 #size-cells = <0>;
253 ethphy0: ethernet-phy@0 {
254 compatible = "ethernet-phy-ieee802.3-c22";
256 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
257 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
258 tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
259 rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
265 gpio-line-names = "", "", "", "", "", "", "", "",
272 gpio-line-names = "", "", "", "", "", "", "", "",
279 gpio-line-names = "", "m2_gdis#", "", "", "", "", "", "m2_off#",
286 gpio-line-names = "", "", "", "", "", "", "", "",
295 gpio-line-names = "", "", "", "mipi_gpio4",
303 clock-frequency = <100000>;
304 pinctrl-names = "default", "gpio";
305 pinctrl-0 = <&pinctrl_i2c1>;
306 pinctrl-1 = <&pinctrl_i2c1_gpio>;
307 scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
308 sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
314 pinctrl-0 = <&pinctrl_gsc>;
315 interrupt-parent = <&gpio2>;
317 interrupt-controller;
318 #interrupt-cells = <1>;
319 #address-cells = <1>;
320 #size-cells = <0>;
323 compatible = "gw,gsc-adc";
324 #address-cells = <1>;
325 #size-cells = <0>;
343 gw,voltage-divider-ohms = <22100 1000>;
344 gw,voltage-offset-microvolt = <700000>;
351 gw,voltage-divider-ohms = <10000 10000>;
358 gw,voltage-divider-ohms = <10000 10000>;
401 gw,voltage-divider-ohms = <10000 10000>;
408 gw,voltage-divider-ohms = <10000 10000>;
415 gw,voltage-divider-ohms = <10000 10000>;
423 gpio-controller;
424 #gpio-cells = <2>;
425 interrupt-parent = <&gsc>;
432 pinctrl-names = "default";
433 pinctrl-0 = <&pinctrl_pmic>;
434 interrupt-parent = <&gpio3>;
436 rohm,reset-snvs-powered;
437 #clock-cells = <0>;
439 clock-output-names = "clk-32k-out";
442 /* vdd_soc: 0.805-0.900V (typ=0.8V) */
444 regulator-name = "buck1";
445 regulator-min-microvolt = <700000>;
446 regulator-max-microvolt = <1300000>;
447 regulator-boot-on;
448 regulator-always-on;
449 regulator-ramp-delay = <1250>;
452 /* vdd_arm: 0.805-1.0V (typ=0.9V) */
454 regulator-name = "buck2";
455 regulator-min-microvolt = <700000>;
456 regulator-max-microvolt = <1300000>;
457 regulator-boot-on;
458 regulator-always-on;
459 regulator-ramp-delay = <1250>;
460 rohm,dvs-run-voltage = <1000000>;
461 rohm,dvs-idle-voltage = <900000>;
464 /* vdd_0p9: 0.805-1.0V (typ=0.9V) */
466 regulator-name = "buck3";
467 regulator-min-microvolt = <700000>;
468 regulator-max-microvolt = <1350000>;
469 regulator-boot-on;
470 regulator-always-on;
475 regulator-name = "buck4";
476 regulator-min-microvolt = <3000000>;
477 regulator-max-microvolt = <3300000>;
478 regulator-boot-on;
479 regulator-always-on;
484 regulator-name = "buck5";
485 regulator-min-microvolt = <1605000>;
486 regulator-max-microvolt = <1995000>;
487 regulator-boot-on;
488 regulator-always-on;
493 regulator-name = "buck6";
494 regulator-min-microvolt = <800000>;
495 regulator-max-microvolt = <1400000>;
496 regulator-boot-on;
497 regulator-always-on;
502 regulator-name = "ldo1";
503 regulator-min-microvolt = <1600000>;
504 regulator-max-microvolt = <1900000>;
505 regulator-boot-on;
506 regulator-always-on;
511 regulator-name = "ldo2";
512 regulator-min-microvolt = <800000>;
513 regulator-max-microvolt = <900000>;
514 regulator-boot-on;
515 regulator-always-on;
520 regulator-name = "ldo3";
521 regulator-min-microvolt = <1800000>;
522 regulator-max-microvolt = <3300000>;
523 regulator-boot-on;
524 regulator-always-on;
528 regulator-name = "ldo4";
529 regulator-min-microvolt = <900000>;
530 regulator-max-microvolt = <1800000>;
531 regulator-boot-on;
532 regulator-always-on;
536 regulator-name = "ldo6";
537 regulator-min-microvolt = <900000>;
538 regulator-max-microvolt = <1800000>;
539 regulator-boot-on;
540 regulator-always-on;
576 clock-frequency = <400000>;
577 pinctrl-names = "default", "gpio";
578 pinctrl-0 = <&pinctrl_i2c2>;
579 pinctrl-1 = <&pinctrl_i2c2_gpio>;
580 scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
581 sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
586 pinctrl-names = "default";
587 pinctrl-0 = <&pinctrl_accel>;
589 st,drdy-int-pin = <1>;
590 interrupt-parent = <&gpio1>;
595 /* off-board header */
597 clock-frequency = <400000>;
598 pinctrl-names = "default", "gpio";
599 pinctrl-0 = <&pinctrl_i2c3>;
600 pinctrl-1 = <&pinctrl_i2c3_gpio>;
601 scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
602 sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
606 /* off-board header */
608 clock-frequency = <400000>;
609 pinctrl-names = "default", "gpio";
610 pinctrl-0 = <&pinctrl_i2c4>;
611 pinctrl-1 = <&pinctrl_i2c4_gpio>;
612 scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
613 sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
618 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
619 fsl,clkreq-unsupported;
621 clock-names = "ref";
626 pinctrl-names = "default";
627 pinctrl-0 = <&pinctrl_pcie0>;
628 reset-gpio = <&gpio4 5 GPIO_ACTIVE_LOW>;
631 assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
633 assigned-clock-rates = <10000000>, <250000000>;
634 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
641 #address-cells = <3>;
642 #size-cells = <2>;
647 #address-cells = <3>;
648 #size-cells = <2>;
651 local-mac-address = [00 00 00 00 00 00];
656 /* off-board header */
658 pinctrl-names = "default";
659 pinctrl-0 = <&pinctrl_sai3>;
660 assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
661 assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
662 assigned-clock-rates = <24576000>;
668 pinctrl-names = "default";
669 pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>;
670 rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
671 cts-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
677 pinctrl-names = "default";
678 pinctrl-0 = <&pinctrl_uart2>;
684 pinctrl-names = "default";
685 pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>;
686 rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
687 cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
691 compatible = "brcm,bcm4330-bt";
692 shutdown-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
698 pinctrl-names = "default";
699 pinctrl-0 = <&pinctrl_uart4>;
700 rts-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
701 cts-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>;
702 dtr-gpios = <&gpio4 3 GPIO_ACTIVE_LOW>;
703 dsr-gpios = <&gpio4 4 GPIO_ACTIVE_LOW>;
704 dcd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
710 vbus-supply = <®_usb1_vbus>;
711 disable-over-current;
717 disable-over-current;
723 pinctrl-names = "default", "state_100mhz", "state_200mhz";
724 pinctrl-0 = <&pinctrl_usdhc2>;
725 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
726 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
727 bus-width = <4>;
728 non-removable;
729 vmmc-supply = <®_wifi>;
730 #address-cells = <1>;
731 #size-cells = <0>;
735 compatible = "brcm,bcm43455-fmac", "brcm,bcm4329-fmac";
742 pinctrl-names = "default", "state_100mhz", "state_200mhz";
743 pinctrl-0 = <&pinctrl_usdhc3>;
744 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
745 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
746 bus-width = <8>;
747 non-removable;
752 pinctrl-names = "default";
753 pinctrl-0 = <&pinctrl_wdog>;
754 fsl,ext-reset-output;
759 pinctrl-names = "default";
760 pinctrl-0 = <&pinctrl_hog>;
1010 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
1021 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
1048 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
1064 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {