Lines Matching +full:snvs +full:- +full:rtc
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML";
11 compatible = "tq,imx8mm-tqma8mqml", "fsl,imx8mm";
19 /* e-MMC IO, needed for HS modes */
20 reg_vcc1v8: regulator-vcc1v8 {
21 compatible = "regulator-fixed";
22 regulator-name = "TQMA8MXML_VCC1V8";
23 regulator-min-microvolt = <1800000>;
24 regulator-max-microvolt = <1800000>;
28 reg_vcc3v3: regulator-vcc3v3 {
29 compatible = "regulator-fixed";
30 regulator-name = "TQMA8MXML_VCC3V3";
31 regulator-min-microvolt = <3300000>;
32 regulator-max-microvolt = <3300000>;
35 reserved-memory {
36 #address-cells = <2>;
37 #size-cells = <2>;
42 compatible = "shared-dma-pool";
46 /* 1024 - 128 MiB, our minimum RAM config will be 1024 MiB */
47 alloc-ranges = <0 0x40000000 0 0x78000000>;
48 linux,cma-default;
54 cpu-supply = <&buck2_reg>;
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_flexspi>;
63 compatible = "jedec,spi-nor";
65 spi-max-frequency = <84000000>;
66 spi-tx-bus-width = <1>;
67 spi-rx-bus-width = <4>;
68 vcc-supply = <&buck5_reg>;
71 compatible = "fixed-partitions";
72 #address-cells = <1>;
73 #size-cells = <1>;
87 pinctrl-names = "default", "gpio";
88 pinctrl-0 = <&pinctrl_i2c1>;
89 pinctrl-1 = <&pinctrl_i2c1_gpio>;
90 scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
91 sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
94 sensor0: temperature-sensor@1b {
95 compatible = "nxp,se97b", "jedec,jc-42.4-temp";
104 pinctrl-0 = <&pinctrl_pmic>;
105 pinctrl-names = "default";
106 interrupt-parent = <&gpio1>;
112 regulator-name = "BUCK1";
113 regulator-min-microvolt = <850000>;
114 regulator-max-microvolt = <850000>;
115 regulator-boot-on;
116 regulator-always-on;
117 regulator-ramp-delay = <3125>;
122 regulator-name = "BUCK2";
123 regulator-min-microvolt = <850000>;
124 regulator-max-microvolt = <1000000>;
125 regulator-boot-on;
126 regulator-always-on;
127 nxp,dvs-run-voltage = <950000>;
128 nxp,dvs-standby-voltage = <850000>;
129 regulator-ramp-delay = <3125>;
134 regulator-name = "BUCK3";
135 regulator-min-microvolt = <850000>;
136 regulator-max-microvolt = <950000>;
137 regulator-boot-on;
138 regulator-always-on;
139 regulator-ramp-delay = <3125>;
142 /* VCC3V3 -> VMMC, ... must not be changed */
144 regulator-name = "BUCK4";
145 regulator-min-microvolt = <3300000>;
146 regulator-max-microvolt = <3300000>;
147 regulator-boot-on;
148 regulator-always-on;
151 /* V_1V8 -> VQMMC, SPI-NOR, ... must not be changed */
153 regulator-name = "BUCK5";
154 regulator-min-microvolt = <1800000>;
155 regulator-max-microvolt = <1800000>;
156 regulator-boot-on;
157 regulator-always-on;
160 /* V_1V1 -> RAM, ... must not be changed */
162 regulator-name = "BUCK6";
163 regulator-min-microvolt = <1100000>;
164 regulator-max-microvolt = <1100000>;
165 regulator-boot-on;
166 regulator-always-on;
171 regulator-name = "LDO1";
172 regulator-min-microvolt = <1800000>;
173 regulator-max-microvolt = <1800000>;
174 regulator-boot-on;
175 regulator-always-on;
180 regulator-name = "LDO2";
181 regulator-min-microvolt = <800000>;
182 regulator-max-microvolt = <850000>;
183 regulator-boot-on;
184 regulator-always-on;
189 regulator-name = "LDO3";
190 regulator-min-microvolt = <1800000>;
191 regulator-max-microvolt = <1800000>;
192 regulator-boot-on;
193 regulator-always-on;
198 regulator-name = "LDO4";
199 regulator-min-microvolt = <900000>;
200 regulator-max-microvolt = <900000>;
201 regulator-boot-on;
202 regulator-always-on;
205 /* VCC SD IO - switched using SD2 VSELECT */
207 regulator-name = "LDO5";
208 regulator-min-microvolt = <1800000>;
209 regulator-max-microvolt = <3300000>;
215 pcf85063: rtc@51 {
218 quartz-load-femtofarads = <7000>;
223 read-only;
226 vcc-supply = <®_vcc3v3>;
233 vcc-supply = <®_vcc3v3>;
238 vddcore-supply = <&ldo4_reg>;
239 vddio-supply = <&ldo3_reg>;
243 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
244 fsl,clkreq-unsupported;
248 pinctrl-names = "default", "state_100mhz", "state_200mhz";
249 pinctrl-0 = <&pinctrl_usdhc3>;
250 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
251 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
252 bus-width = <8>;
253 non-removable;
254 no-sd;
255 no-sdio;
256 vmmc-supply = <®_vcc3v3>;
257 vqmmc-supply = <®_vcc1v8>;
264 * without LDO for SNVS. GPIO1_IO02 must not be used as GPIO.
267 pinctrl-names = "default";
268 pinctrl-0 = <&pinctrl_wdog>;
269 fsl,ext-reset-output;
317 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
333 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {