Lines Matching +full:tx +full:- +full:deemph +full:- +full:gen1
1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include "imx8mm-phycore-som.dtsi"
15 model = "PHYTEC phyBOARD-Polis-i.MX8MM RDK";
16 compatible = "phytec,imx8mm-phyboard-polis-rdk",
17 "phytec,imx8mm-phycore-som", "fsl,imx8mm";
20 stdout-path = &uart3;
23 bt_osc_32k: bt-lp-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <32768>;
26 clock-output-names = "bt_osc_32k";
27 #clock-cells = <0>;
30 can_osc_40m: can-clock {
31 compatible = "fixed-clock";
32 clock-frequency = <40000000>;
33 clock-output-names = "can_osc_40m";
34 #clock-cells = <0>;
38 compatible = "gpio-fan";
40 gpio-fan,speed-map = <0 0
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_fan>;
44 #cooling-cells = <2>;
48 compatible = "gpio-leds";
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_leds>;
52 led-0 {
56 linux,default-trigger = "mmc2";
59 led-1 {
63 linux,default-trigger = "mmc1";
66 led-2 {
70 linux,default-trigger = "heartbeat";
74 usdhc1_pwrseq: pwr-seq {
75 compatible = "mmc-pwrseq-simple";
76 post-power-on-delay-ms = <100>;
77 power-off-delay-us = <60>;
78 reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
81 reg_can_en: regulator-can-en {
82 compatible = "regulator-fixed";
84 pinctrl-names = "default";
85 pinctrl-0 = <&pinctrl_can_en>;
86 regulator-max-microvolt = <3300000>;
87 regulator-min-microvolt = <3300000>;
88 regulator-name = "CAN_EN";
89 startup-delay-us = <20>;
92 reg_usb_otg1_vbus: regulator-usb-otg1 {
93 compatible = "regulator-fixed";
95 enable-active-high;
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_usbotg1pwrgrp>;
98 regulator-name = "usb_otg1_vbus";
99 regulator-max-microvolt = <5000000>;
100 regulator-min-microvolt = <5000000>;
103 reg_usdhc2_vmmc: regulator-usdhc2 {
104 compatible = "regulator-fixed";
106 enable-active-high;
107 off-on-delay-us = <20000>;
108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
110 regulator-max-microvolt = <3300000>;
111 regulator-min-microvolt = <3300000>;
112 regulator-name = "VSD_3V3";
115 reg_vcc_3v3: regulator-vcc-3v3 {
116 compatible = "regulator-fixed";
117 regulator-max-microvolt = <3300000>;
118 regulator-min-microvolt = <3300000>;
119 regulator-name = "VCC_3V3";
123 /* SPI - CAN MCP251XFD */
125 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
126 pinctrl-names = "default";
127 pinctrl-0 = <&pinctrl_ecspi1>;
133 interrupt-parent = <&gpio1>;
135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_can_int>;
138 spi-max-frequency = <20000000>;
139 xceiver-supply = <®_can_en>;
145 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
146 pinctrl-names = "default";
147 pinctrl-0 = <&pinctrl_ecspi2>;
148 #address-cells = <1>;
149 #size-cells = <0>;
153 compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
154 interrupt-parent = <&gpio2>;
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_tpm>;
159 spi-max-frequency = <43000000>;
164 gpio-line-names = "", "LED_RED", "WDOG_INT", "X_RTC_INT",
171 gpio-line-names = "", "", "", "",
179 gpio-line-names = "", "", "", "",
186 gpio-line-names = "", "", "", "",
192 clock-frequency = <400000>;
193 pinctrl-names = "default", "gpio";
194 pinctrl-0 = <&pinctrl_i2c4>;
195 pinctrl-1 = <&pinctrl_i2c4_gpio>;
196 sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
197 scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
202 assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
204 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
206 assigned-clock-rates = <10000000>, <250000000>;
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_pcie>;
209 reset-gpio = <&gpio4 9 GPIO_ACTIVE_LOW>;
215 fsl,clkreq-unsupported;
216 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
217 fsl,tx-deemph-gen1 = <0x2d>;
218 fsl,tx-deemph-gen2 = <0xf>;
223 aux-voltage-chargeable = <1>;
224 trickle-resistor-ohms = <3000>;
231 /* UART - RS232/RS485 */
233 assigned-clocks = <&clk IMX8MM_CLK_UART1>;
234 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
235 pinctrl-names = "default";
236 pinctrl-0 = <&pinctrl_uart1>;
237 uart-has-rtscts;
241 /* UART - Sterling-LWB Bluetooth */
243 assigned-clocks = <&clk IMX8MM_CLK_UART2>;
244 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
245 fsl,dte-mode;
246 pinctrl-names = "default";
247 pinctrl-0 = <&pinctrl_uart2_bt>;
248 uart-has-rtscts;
252 compatible = "brcm,bcm43438-bt";
254 clock-names = "lpo";
255 device-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
256 interrupt-names = "host-wakeup";
257 interrupt-parent = <&gpio2>;
259 max-speed = <2000000>;
260 pinctrl-names = "default";
261 pinctrl-0 = <&pinctrl_bt>;
262 shutdown-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
263 vddio-supply = <®_vcc_3v3>;
267 /* UART - console */
269 pinctrl-names = "default";
270 pinctrl-0 = <&pinctrl_uart3>;
276 adp-disable;
278 over-current-active-low;
279 samsung,picophy-pre-emp-curr-control = <3>;
280 samsung,picophy-dc-vol-level-adjust = <7>;
281 srp-disable;
282 vbus-supply = <®_usb_otg1_vbus>;
287 disable-over-current;
289 samsung,picophy-pre-emp-curr-control = <3>;
290 samsung,picophy-dc-vol-level-adjust = <7>;
294 /* SDIO - Sterling-LWB Wifi */
296 assigned-clocks = <&clk IMX8MM_CLK_USDHC1>;
297 assigned-clock-rates = <200000000>;
298 bus-width = <4>;
299 mmc-pwrseq = <&usdhc1_pwrseq>;
300 non-removable;
301 no-1-8-v;
302 pinctrl-names = "default";
303 pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_wlan>;
304 #address-cells = <1>;
305 #size-cells = <0>;
309 compatible = "brcm,bcm4329-fmac";
314 /* SD-Card */
316 assigned-clocks = <&clk IMX8MM_CLK_USDHC2>;
317 assigned-clock-rates = <200000000>;
318 bus-width = <4>;
319 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
320 disable-wp;
321 pinctrl-names = "default", "state_100mhz", "state_200mhz";
322 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
323 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
324 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
325 vmmc-supply = <®_usdhc2_vmmc>;
326 vqmmc-supply = <®_nvcc_sd2>;
339 pinctrl_can_en: can-engrp {
345 pinctrl_can_int: can-intgrp {
477 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
489 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {