Lines Matching +full:gpio +full:- +full:beeper
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "imx8mm-tqma8mqml.dtsi"
12 compatible = "cloos,imx8mm-phg", "tq,imx8mm-tqma8mqml", "fsl,imx8mm";
20 stdout-path = &uart2;
23 beeper {
24 compatible = "gpio-beeper";
25 pinctrl-0 = <&pinctrl_beeper>;
30 compatible = "gpio-leds";
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_gpio_led>;
34 led-0 {
39 led-1 {
44 led-2 {
49 led-3 {
54 led-4 {
60 reg_usb_otg_vbus: regulator-usb-otg-vbus {
61 compatible = "regulator-fixed";
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_otg_vbus_ctrl>;
64 regulator-name = "usb_otg_vbus";
65 regulator-min-microvolt = <5000000>;
66 regulator-max-microvolt = <5000000>;
67 gpio = <&gpio2 2 GPIO_ACTIVE_HIGH>;
68 enable-active-high;
71 reg_usdhc2_vmmc: regulator-vmmc {
72 compatible = "regulator-fixed";
73 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
75 regulator-name = "VSD_3V3";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
78 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
79 enable-active-high;
80 startup-delay-us = <100>;
81 off-on-delay-us = <12000>;
85 compatible = "panel-lvds";
86 width-mm = <170>;
87 height-mm = <28>;
88 data-mapping = "jeida-18";
90 panel-timing {
91 clock-frequency = <49500000>;
93 hback-porch = <48>;
94 hfront-porch = <312>;
95 hsync-len = <40>;
97 vback-porch = <19>;
98 vfront-porch = <61>;
99 vsync-len = <20>;
100 hsync-active = <0>;
101 vsync-active = <0>;
102 de-active = <1>;
103 pixelclk-active = <1>;
108 remote-endpoint = <&bridge_out_panel>;
120 pinctrl-names = "default";
121 pinctrl-0 = <&pinctrl_ecspi1>;
122 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_fec1>;
129 phy-mode = "rgmii-id";
130 phy-handle = <ðphy0>;
131 fsl,magic-packet;
135 #address-cells = <1>;
136 #size-cells = <0>;
138 ethphy0: ethernet-phy@0 {
140 compatible = "ethernet-phy-ieee802.3-c22";
146 clock-frequency = <100000>;
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_i2c2>;
154 enable-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_dsi_bridge>;
159 #address-cells = <1>;
160 #size-cells = <0>;
166 remote-endpoint = <&dsi_out_bridge>;
167 data-lanes = <1 2 3 4>;
175 remote-endpoint = <&panel_out_bridge>;
187 samsung,esc-clock-frequency = <10000000>;
195 data-lanes = <1 2>;
196 lane-polarities = <1 0 0 0 0>;
197 remote-endpoint = <&bridge_in_dsi>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_uart2>;
211 power-domains = <&pgc_otg1>;
215 power-domains = <&pgc_otg2>;
220 vbus-supply = <®_usb_otg_vbus>;
230 assigned-clocks = <&clk IMX8MM_CLK_USDHC2>;
231 assigned-clock-rates = <400000000>;
232 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_400M>;
233 pinctrl-names = "default", "state_100mhz", "state_200mhz";
234 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
235 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
236 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
237 bus-width = <4>;
238 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
239 disable-wp;
240 no-mmc;
241 no-sdio;
242 sd-uhs-sdr104;
243 sd-uhs-ddr50;
244 vmmc-supply = <®_usdhc2_vmmc>;
337 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
348 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {