Lines Matching +full:0 +full:x19
25 pinctrl-0 = <&pinctrl_beeper>;
26 gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
32 pinctrl-0 = <&pinctrl_gpio_led>;
34 led-0 {
63 pinctrl-0 = <&pinctrl_otg_vbus_ctrl>;
74 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
100 hsync-active = <0>;
101 vsync-active = <0>;
121 pinctrl-0 = <&pinctrl_ecspi1>;
128 pinctrl-0 = <&pinctrl_fec1>;
136 #size-cells = <0>;
138 ethphy0: ethernet-phy@0 {
139 reg = <0>;
148 pinctrl-0 = <&pinctrl_i2c2>;
153 reg = <0x2c>;
156 pinctrl-0 = <&pinctrl_dsi_bridge>;
160 #size-cells = <0>;
162 port@0 {
163 reg = <0>;
196 lane-polarities = <1 0 0 0 0>;
206 pinctrl-0 = <&pinctrl_uart2>;
234 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
251 MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x19
257 MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x19
263 MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
264 MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
265 MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82
266 MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
272 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x40000002
273 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x40000002
274 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x14
275 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x14
276 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x14
277 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x14
278 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x90
279 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x90
280 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x90
281 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x90
282 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x14
283 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x90
284 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x90
285 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x14
286 MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x10
292 MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19
293 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19
294 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19
295 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
296 MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x19
302 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
303 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
309 MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x119
315 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
316 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
322 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
328 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
329 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
330 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
331 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
332 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
333 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
339 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
340 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
341 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
342 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
343 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
344 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
350 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
351 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
352 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
353 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
354 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
355 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6