Lines Matching +full:solid +full:- +full:state

1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2023 Josua Mayer <josua@solid-run.com>
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
10 #include "fsl-lx2162a-sr-som.dtsi"
14 	compatible = "solidrun,lx2162a-clearfog", "solidrun,lx2162a-som", "fsl,lx2160a";
35 		stdout-path = "serial0:115200n8";
39 		compatible = "gpio-leds";
41 		led_sfp_at: led-sfp-at {
43 			default-state = "off";
46 		led_sfp_ab: led-sfp-ab {
48 			default-state = "off";
51 		led_sfp_bt: led-sfp-bt {
53 			default-state = "off";
56 		led_sfp_bb: led-sfp-bb {
58 			default-state = "off";
62 	sfp_at: sfp-at {
64 		i2c-bus = <&sfp_i2c0>;
65 		mod-def0-gpios = <&gpio2 16 GPIO_ACTIVE_LOW>; /* EVT4_B */
66 		maximum-power-milliwatt = <2000>;
69 	sfp_ab: sfp-ab {
71 		i2c-bus = <&sfp_i2c1>;
72 		mod-def0-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; /* PROC_IRQ1 */
73 		maximum-power-milliwatt = <2000>;
76 	sfp_bt: sfp-bt {
78 		i2c-bus = <&sfp_i2c2>;
79 		mod-def0-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; /* PROC_IRQ10 */
80 		maximum-power-milliwatt = <2000>;
83 	sfp_bb: sfp-bb {
85 		i2c-bus = <&sfp_i2c3>;
86 		mod-def0-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; /* EVT3_B */
87 		maximum-power-milliwatt = <2000>;
93 	managed = "in-band-status";
99 	managed = "in-band-status";
105 	managed = "in-band-status";
111 	managed = "in-band-status";
117 	phy-handle = <&ethernet_phy3>;
118 	phy-connection-type = "sgmii";
124 	phy-handle = <&ethernet_phy1>;
125 	phy-connection-type = "sgmii";
131 	phy-handle = <&ethernet_phy6>;
132 	phy-connection-type = "sgmii";
138 	phy-handle = <&ethernet_phy8>;
139 	phy-connection-type = "sgmii";
145 	phy-handle = <&ethernet_phy4>;
146 	phy-connection-type = "sgmii";
152 	phy-handle = <&ethernet_phy2>;
153 	phy-connection-type = "sgmii";
158 	/* override connection to on-SoM phy */
159 	/delete-property/ phy-handle;
160 	/delete-property/ phy-connection-type;
163 	phy-handle = <&ethernet_phy5>;
164 	phy-connection-type = "sgmii";
170 	phy-handle = <&ethernet_phy7>;
171 	phy-connection-type = "sgmii";
176 	ethernet_phy1: ethernet-phy@8 {
177 		compatible = "ethernet-phy-ieee802.3-c45";
179 		max-speed = <1000>;
182 	ethernet_phy2: ethernet-phy@9 {
183 		compatible = "ethernet-phy-ieee802.3-c45";
185 		max-speed = <1000>;
188 	ethernet_phy3: ethernet-phy@10 {
189 		compatible = "ethernet-phy-ieee802.3-c45";
191 		max-speed = <1000>;
194 	ethernet_phy4: ethernet-phy@11 {
195 		compatible = "ethernet-phy-ieee802.3-c45";
197 		max-speed = <1000>;
200 	ethernet_phy5: ethernet-phy@12 {
201 		compatible = "ethernet-phy-ieee802.3-c45";
203 		max-speed = <1000>;
206 	ethernet_phy6: ethernet-phy@13 {
207 		compatible = "ethernet-phy-ieee802.3-c45";
209 		max-speed = <1000>;
212 	ethernet_phy7: ethernet-phy@14 {
213 		compatible = "ethernet-phy-ieee802.3-c45";
215 		max-speed = <1000>;
218 	ethernet_phy8: ethernet-phy@15 {
219 		compatible = "ethernet-phy-ieee802.3-c45";
221 		max-speed = <1000>;
226 	sd-uhs-sdr104;
227 	sd-uhs-sdr50;
228 	sd-uhs-sdr25;
229 	sd-uhs-sdr12;
246 	i2c-mux@70 {
249 		#address-cells = <1>;
250 		#size-cells = <0>;
251 		i2c-mux-idle-disconnect;
254 			#address-cells = <1>;
255 			#size-cells = <0>;
260 			#address-cells = <1>;
261 			#size-cells = <0>;
266 			#address-cells = <1>;
267 			#size-cells = <0>;
272 			#address-cells = <1>;
273 			#size-cells = <0>;
278 	i2c-mux@71 {
281 		#address-cells = <1>;
282 		#size-cells = <0>;
283 		i2c-mux-idle-disconnect;
286 			#address-cells = <1>;
287 			#size-cells = <0>;
292 			#address-cells = <1>;
293 			#size-cells = <0>;
298 			#address-cells = <1>;
299 			#size-cells = <0>;
302 			/* clock-controller@6b */