Lines Matching +full:mdio +full:- +full:mux +full:- +full:2
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-qds", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
31 regulator-boot-on;
32 regulator-always-on;
35 mdio-mux-1 {
36 compatible = "mdio-mux-multiplexer";
37 mux-controls = <&mux 0>;
38 mdio-parent-bus = <&emdio1>;
39 #address-cells = <1>;
40 #size-cells = <0>;
42 mdio@0 { /* On-board PHY #1 RGMI1*/
44 #address-cells = <1>;
45 #size-cells = <0>;
47 rgmii_phy1: ethernet-phy@1 {
48 compatible = "ethernet-phy-id001c.c916";
53 mdio@8 { /* On-board PHY #2 RGMI2*/
55 #address-cells = <1>;
56 #size-cells = <0>;
58 rgmii_phy2: ethernet-phy@2 {
59 compatible = "ethernet-phy-id001c.c916";
64 mdio@18 { /* Slot #1 */
66 #address-cells = <1>;
67 #size-cells = <0>;
70 mdio@19 { /* Slot #2 */
72 #address-cells = <1>;
73 #size-cells = <0>;
76 mdio@1a { /* Slot #3 */
78 #address-cells = <1>;
79 #size-cells = <0>;
82 mdio@1b { /* Slot #4 */
84 #address-cells = <1>;
85 #size-cells = <0>;
88 mdio@1c { /* Slot #5 */
90 #address-cells = <1>;
91 #size-cells = <0>;
94 mdio@1d { /* Slot #6 */
96 #address-cells = <1>;
97 #size-cells = <0>;
100 mdio@1e { /* Slot #7 */
102 #address-cells = <1>;
103 #size-cells = <0>;
106 mdio@1f { /* Slot #8 */
108 #address-cells = <1>;
109 #size-cells = <0>;
113 mdio-mux-2 {
114 compatible = "mdio-mux-multiplexer";
115 mux-controls = <&mux 1>;
116 mdio-parent-bus = <&emdio2>;
117 #address-cells = <1>;
118 #size-cells = <0>;
120 mdio@0 { /* Slot #1 (secondary EMI) */
122 #address-cells = <1>;
123 #size-cells = <0>;
126 mdio@1 { /* Slot #2 (secondary EMI) */
128 #address-cells = <1>;
129 #size-cells = <0>;
132 mdio@2 { /* Slot #3 (secondary EMI) */
134 #address-cells = <1>;
135 #size-cells = <0>;
138 mdio@3 { /* Slot #4 (secondary EMI) */
140 #address-cells = <1>;
141 #size-cells = <0>;
144 mdio@4 { /* Slot #5 (secondary EMI) */
146 #address-cells = <1>;
147 #size-cells = <0>;
150 mdio@5 { /* Slot #6 (secondary EMI) */
152 #address-cells = <1>;
153 #size-cells = <0>;
156 mdio@6 { /* Slot #7 (secondary EMI) */
158 #address-cells = <1>;
159 #size-cells = <0>;
162 mdio@7 { /* Slot #8 (secondary EMI) */
164 #address-cells = <1>;
165 #size-cells = <0>;
183 phy-handle = <&rgmii_phy1>;
184 phy-connection-type = "rgmii-id";
188 phy-handle = <&rgmii_phy2>;
189 phy-connection-type = "rgmii-id";
196 #address-cells = <1>;
197 #size-cells = <1>;
198 compatible = "jedec,spi-nor";
200 spi-max-frequency = <1000000>;
208 #address-cells = <1>;
209 #size-cells = <1>;
210 compatible = "jedec,spi-nor";
212 spi-max-frequency = <1000000>;
220 #address-cells = <1>;
221 #size-cells = <1>;
222 compatible = "jedec,spi-nor";
224 spi-max-frequency = <1000000>;
248 #address-cells = <1>;
249 #size-cells = <1>;
250 compatible = "jedec,spi-nor";
251 m25p,fast-read;
252 spi-max-frequency = <50000000>;
254 spi-rx-bus-width = <8>;
255 spi-tx-bus-width = <8>;
263 compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
264 "simple-mfd";
267 mux: mux-controller { label
268 compatible = "reg-mux";
269 #mux-control-cells = <1>;
270 mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
271 <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
275 i2c-mux@77 {
278 #address-cells = <1>;
279 #size-cells = <0>;
281 i2c@2 {
282 #address-cells = <1>;
283 #size-cells = <0>;
286 power-monitor@40 {
289 shunt-resistor = <500>;
292 power-monitor@41 {
295 shunt-resistor = <1000>;
300 #address-cells = <1>;
301 #size-cells = <0>;
304 temperature-sensor@4c {
307 vcc-supply = <&sb_3v3>;
310 temperature-sensor@4d {
313 vcc-supply = <&sb_3v3>;