Lines Matching +full:phy +full:- +full:i2c
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2020-2021 NXP
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-bluebox3", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
31 regulator-boot-on;
32 regulator-always-on;
39 can-transceiver {
40 max-bitrate = <5000000>;
47 can-transceiver {
48 max-bitrate = <5000000>;
57 phy-handle = <&aqr113c_phy1>;
58 phy-mode = "usxgmii";
59 managed = "in-band-status";
63 phy-handle = <&aqr113c_phy2>;
64 phy-mode = "usxgmii";
65 managed = "in-band-status";
69 phy-handle = <&aqr113c_phy3>;
70 phy-mode = "usxgmii";
71 managed = "in-band-status";
75 phy-handle = <&aqr113c_phy4>;
76 phy-mode = "usxgmii";
77 managed = "in-band-status";
81 phy-mode = "rgmii";
84 fixed-link {
86 full-duplex;
91 phy-mode = "rgmii";
94 fixed-link {
96 full-duplex;
103 aqr113c_phy2: ethernet-phy@0 {
104 compatible = "ethernet-phy-ieee802.3-c45";
107 interrupts-extended = <&extirq 3 IRQ_TYPE_LEVEL_LOW>;
110 aqr113c_phy1: ethernet-phy@8 {
111 compatible = "ethernet-phy-ieee802.3-c45";
114 interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>;
117 sw1_mii3_phy: ethernet-phy@5 {
119 compatible = "ethernet-phy-id004d.d072";
121 interrupts-extended = <&extirq 6 IRQ_TYPE_LEVEL_LOW>;
124 sw2_mii3_phy: ethernet-phy@6 {
126 compatible = "ethernet-phy-id004d.d072";
128 interrupts-extended = <&extirq 7 IRQ_TYPE_LEVEL_LOW>;
135 aqr113c_phy4: ethernet-phy@0 {
136 compatible = "ethernet-phy-ieee802.3-c45";
139 interrupts-extended = <&extirq 5 IRQ_TYPE_LEVEL_LOW>;
142 aqr113c_phy3: ethernet-phy@8 {
143 compatible = "ethernet-phy-ieee802.3-c45";
146 interrupts-extended = <&extirq 4 IRQ_TYPE_LEVEL_LOW>;
151 sd-uhs-sdr104;
152 sd-uhs-sdr50;
153 sd-uhs-sdr25;
154 sd-uhs-sdr12;
159 mmc-hs200-1_8v;
160 mmc-hs400-1_8v;
161 bus-width = <8>;
169 compatible = "jedec,spi-nor";
170 #address-cells = <1>;
171 #size-cells = <1>;
173 m25p,fast-read;
174 spi-max-frequency = <50000000>;
175 spi-rx-bus-width = <8>;
176 spi-tx-bus-width = <8>;
180 compatible = "jedec,spi-nor";
181 #address-cells = <1>;
182 #size-cells = <1>;
184 m25p,fast-read;
185 spi-max-frequency = <50000000>;
186 spi-rx-bus-width = <8>;
187 spi-tx-bus-width = <8>;
194 i2c-mux@77 {
197 #address-cells = <1>;
198 #size-cells = <0>;
200 i2c@2 {
201 #address-cells = <1>;
202 #size-cells = <0>;
205 power-monitor@40 {
208 shunt-resistor = <500>;
212 i2c@3 {
213 #address-cells = <1>;
214 #size-cells = <0>;
217 temp2: temperature-sensor@48 {
220 vcc-supply = <&sb_3v3>;
221 #thermal-sensor-cells = <1>;
224 temp1: temperature-sensor@4c {
227 vcc-supply = <&sb_3v3>;
228 #thermal-sensor-cells = <1>;
232 i2c@4 {
233 #address-cells = <1>;
234 #size-cells = <0>;
240 interrupts-extended = <&extirq 11 IRQ_TYPE_LEVEL_LOW>;
244 i2c@7 {
245 #address-cells = <1>;
246 #size-cells = <0>;
249 i2c-mux@75 {
252 #address-cells = <1>;
253 #size-cells = <0>;
255 i2c@0 {
256 #address-cells = <1>;
257 #size-cells = <0>;
263 #address-cells = <1>;
264 #size-cells = <0>;
275 i2c-mux@77 {
278 #address-cells = <1>;
279 #size-cells = <0>;
281 i2c@1 {
282 #address-cells = <1>;
283 #size-cells = <0>;
286 /* The I2C multiplexer and temperature sensors are on
289 i2c-mux@70 {
292 #address-cells = <1>;
293 #size-cells = <0>;
295 i2c@6 {
296 #address-cells = <1>;
297 #size-cells = <0>;
300 q12: temperature-sensor@4c {
303 vcc-supply = <&sb_3v3>;
304 #thermal-sensor-cells = <1>;
308 i2c@7 {
309 #address-cells = <1>;
310 #size-cells = <0>;
313 q11: temperature-sensor@4c {
316 vcc-supply = <&sb_3v3>;
317 #thermal-sensor-cells = <1>;
320 q13: temperature-sensor@48 {
323 vcc-supply = <&sb_3v3>;
324 #thermal-sensor-cells = <1>;
327 q14: temperature-sensor@4a {
330 vcc-supply = <&sb_3v3>;
331 #thermal-sensor-cells = <1>;
356 sw1: ethernet-switch@0 {
359 spi-max-frequency = <4000000>;
360 spi-cpol;
363 ethernet-ports {
364 #address-cells = <1>;
365 #size-cells = <0>;
377 phy-mode = "sgmii";
379 fixed-link {
381 full-duplex;
388 phy-mode = "rgmii-id";
389 rx-internal-delay-ps = <2000>;
390 tx-internal-delay-ps = <2000>;
392 fixed-link {
394 full-duplex;
401 phy-mode = "rgmii-id";
402 phy-handle = <&sw1_mii3_phy>;
408 phy-mode = "sgmii";
410 fixed-link {
412 full-duplex;
419 phy-mode = "internal";
420 phy-handle = <&sw1_port5_base_t1_phy>;
426 phy-mode = "internal";
427 phy-handle = <&sw1_port6_base_t1_phy>;
433 phy-mode = "internal";
434 phy-handle = <&sw1_port7_base_t1_phy>;
440 phy-mode = "internal";
441 phy-handle = <&sw1_port8_base_t1_phy>;
447 phy-mode = "internal";
448 phy-handle = <&sw1_port9_base_t1_phy>;
454 phy-mode = "internal";
455 phy-handle = <&sw1_port10_base_t1_phy>;
460 #address-cells = <1>;
461 #size-cells = <0>;
464 compatible = "nxp,sja1110-base-t1-mdio";
465 #address-cells = <1>;
466 #size-cells = <0>;
469 sw1_port5_base_t1_phy: ethernet-phy@1 {
470 compatible = "ethernet-phy-ieee802.3-c45";
474 sw1_port6_base_t1_phy: ethernet-phy@2 {
475 compatible = "ethernet-phy-ieee802.3-c45";
479 sw1_port7_base_t1_phy: ethernet-phy@3 {
480 compatible = "ethernet-phy-ieee802.3-c45";
484 sw1_port8_base_t1_phy: ethernet-phy@4 {
485 compatible = "ethernet-phy-ieee802.3-c45";
489 sw1_port9_base_t1_phy: ethernet-phy@5 {
490 compatible = "ethernet-phy-ieee802.3-c45";
494 sw1_port10_base_t1_phy: ethernet-phy@6 {
495 compatible = "ethernet-phy-ieee802.3-c45";
502 sw2: ethernet-switch@2 {
505 spi-max-frequency = <4000000>;
506 spi-cpol;
509 ethernet-ports {
510 #address-cells = <1>;
511 #size-cells = <0>;
522 phy-mode = "sgmii";
524 fixed-link {
526 full-duplex;
533 phy-mode = "rgmii-id";
534 rx-internal-delay-ps = <2000>;
535 tx-internal-delay-ps = <2000>;
537 fixed-link {
539 full-duplex;
546 phy-mode = "rgmii-id";
547 phy-handle = <&sw2_mii3_phy>;
553 phy-mode = "2500base-x";
555 fixed-link {
557 full-duplex;
564 phy-mode = "internal";
565 phy-handle = <&sw2_port5_base_t1_phy>;
571 phy-mode = "internal";
572 phy-handle = <&sw2_port6_base_t1_phy>;
578 phy-mode = "internal";
579 phy-handle = <&sw2_port7_base_t1_phy>;
585 phy-mode = "internal";
586 phy-handle = <&sw2_port8_base_t1_phy>;
592 phy-mode = "internal";
593 phy-handle = <&sw2_port9_base_t1_phy>;
599 phy-mode = "internal";
600 phy-handle = <&sw2_port10_base_t1_phy>;
605 #address-cells = <1>;
606 #size-cells = <0>;
609 compatible = "nxp,sja1110-base-t1-mdio";
610 #address-cells = <1>;
611 #size-cells = <0>;
614 sw2_port5_base_t1_phy: ethernet-phy@1 {
615 compatible = "ethernet-phy-ieee802.3-c45";
619 sw2_port6_base_t1_phy: ethernet-phy@2 {
620 compatible = "ethernet-phy-ieee802.3-c45";
624 sw2_port7_base_t1_phy: ethernet-phy@3 {
625 compatible = "ethernet-phy-ieee802.3-c45";
629 sw2_port8_base_t1_phy: ethernet-phy@4 {
630 compatible = "ethernet-phy-ieee802.3-c45";
634 sw2_port9_base_t1_phy: ethernet-phy@5 {
635 compatible = "ethernet-phy-ieee802.3-c45";
639 sw2_port10_base_t1_phy: ethernet-phy@6 {
640 compatible = "ethernet-phy-ieee802.3-c45";