Lines Matching +full:syscon +full:- +full:chipselects
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
33 #size-cells = <0>;
39 /* DRAM space - 1, size : 2 GB DRAM */
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <100000000>;
46 clock-output-names = "sysclk";
49 gic: interrupt-controller@6000000 {
50 compatible = "arm,gic-v3";
56 #interrupt-cells = <3>;
57 #address-cells = <2>;
58 #size-cells = <2>;
60 interrupt-controller;
63 its: msi-controller@6020000 {
64 compatible = "arm,gic-v3-its";
65 msi-controller;
66 #msi-cells = <1>;
71 rstcr: syscon@1e60000 {
72 compatible = "fsl,ls1028a-reset", "syscon", "simple-mfd";
76 compatible = "syscon-reboot";
82 thermal-zones {
83 ddr-ctrl1-thermal {
84 polling-delay-passive = <1000>;
85 polling-delay = <5000>;
86 thermal-sensors = <&tmu 1>;
89 ddr-ctrler1-crit {
97 ddr-ctrl2-thermal {
98 polling-delay-passive = <1000>;
99 polling-delay = <5000>;
100 thermal-sensors = <&tmu 2>;
103 ddr-ctrler2-crit {
111 ddr-ctrl3-thermal {
112 polling-delay-passive = <1000>;
113 polling-delay = <5000>;
114 thermal-sensors = <&tmu 3>;
117 ddr-ctrler3-crit {
125 cluster1-thermal {
126 polling-delay-passive = <1000>;
127 polling-delay = <5000>;
128 thermal-sensors = <&tmu 4>;
131 core_cluster1_alert: core-cluster1-alert {
137 core-cluster1-crit {
144 cooling-maps {
147 cooling-device =
154 cluster2-thermal {
155 polling-delay-passive = <1000>;
156 polling-delay = <5000>;
157 thermal-sensors = <&tmu 5>;
160 core_cluster2_alert: core-cluster2-alert {
166 core-cluster2-crit {
173 cooling-maps {
176 cooling-device =
183 cluster3-thermal {
184 polling-delay-passive = <1000>;
185 polling-delay = <5000>;
186 thermal-sensors = <&tmu 6>;
189 core_cluster3_alert: core-cluster3-alert {
195 core-cluster3-crit {
202 cooling-maps {
205 cooling-device =
212 cluster4-thermal {
213 polling-delay-passive = <1000>;
214 polling-delay = <5000>;
215 thermal-sensors = <&tmu 7>;
218 core_cluster4_alert: core-cluster4-alert {
224 core-cluster4-crit {
231 cooling-maps {
234 cooling-device =
243 compatible = "arm,armv8-timer";
245 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, /* Physical Non-Secure PPI */
251 compatible = "arm,psci-0.2";
256 compatible = "simple-bus";
257 #address-cells = <2>;
258 #size-cells = <2>;
260 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
263 compatible = "fsl,ls2080a-clockgen";
265 #clock-cells = <2>;
270 compatible = "fsl,ls2080a-dcfg", "syscon";
272 little-endian;
276 compatible = "fsl,ls1028a-sfp";
280 clock-names = "sfp";
283 isc: syscon@1f70000 {
284 compatible = "fsl,ls2080a-isc", "syscon";
286 little-endian;
287 #address-cells = <1>;
288 #size-cells = <1>;
291 extirq: interrupt-controller@14 {
292 compatible = "fsl,ls2080a-extirq", "fsl,ls1088a-extirq";
293 #interrupt-cells = <2>;
294 #address-cells = <0>;
295 interrupt-controller;
297 interrupt-map =
310 interrupt-map-mask = <0xf 0x0>;
315 compatible = "fsl,qoriq-tmu";
318 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
319 fsl,tmu-calibration =
356 little-endian;
357 #thermal-sensor-cells = <1>;
399 clock-names = "wdog_clk", "apb_pclk";
409 clock-names = "wdog_clk", "apb_pclk";
419 clock-names = "wdog_clk", "apb_pclk";
429 clock-names = "wdog_clk", "apb_pclk";
439 clock-names = "wdog_clk", "apb_pclk";
449 clock-names = "wdog_clk", "apb_pclk";
459 clock-names = "wdog_clk", "apb_pclk";
469 clock-names = "wdog_clk", "apb_pclk";
473 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
474 fsl,sec-era = <8>;
475 #address-cells = <1>;
476 #size-cells = <1>;
480 dma-coherent;
483 compatible = "fsl,sec-v5.0-job-ring",
484 "fsl,sec-v4.0-job-ring";
490 compatible = "fsl,sec-v5.0-job-ring",
491 "fsl,sec-v4.0-job-ring";
497 compatible = "fsl,sec-v5.0-job-ring",
498 "fsl,sec-v4.0-job-ring";
504 compatible = "fsl,sec-v5.0-job-ring",
505 "fsl,sec-v4.0-job-ring";
512 compatible = "fsl,dpaa2-console";
516 ptp-timer@8b95000 {
517 compatible = "fsl,dpaa2-ptp";
521 little-endian;
522 fsl,extts-fifo;
526 compatible = "fsl,fman-memac-mdio";
528 little-endian;
529 #address-cells = <1>;
530 #size-cells = <0>;
531 clock-frequency = <2500000>;
538 compatible = "fsl,fman-memac-mdio";
540 little-endian;
541 #address-cells = <1>;
542 #size-cells = <0>;
543 clock-frequency = <2500000>;
550 compatible = "fsl,fman-memac-mdio";
552 little-endian;
553 #address-cells = <1>;
554 #size-cells = <0>;
557 pcs1: ethernet-phy@0 {
563 compatible = "fsl,fman-memac-mdio";
565 little-endian;
566 #address-cells = <1>;
567 #size-cells = <0>;
570 pcs2: ethernet-phy@0 {
576 compatible = "fsl,fman-memac-mdio";
578 little-endian;
579 #address-cells = <1>;
580 #size-cells = <0>;
583 pcs3: ethernet-phy@0 {
589 compatible = "fsl,fman-memac-mdio";
591 little-endian;
592 #address-cells = <1>;
593 #size-cells = <0>;
596 pcs4: ethernet-phy@0 {
602 compatible = "fsl,fman-memac-mdio";
604 little-endian;
605 #address-cells = <1>;
606 #size-cells = <0>;
609 pcs5: ethernet-phy@0 {
615 compatible = "fsl,fman-memac-mdio";
617 little-endian;
618 #address-cells = <1>;
619 #size-cells = <0>;
622 pcs6: ethernet-phy@0 {
628 compatible = "fsl,fman-memac-mdio";
630 little-endian;
631 #address-cells = <1>;
632 #size-cells = <0>;
635 pcs7: ethernet-phy@0 {
641 compatible = "fsl,fman-memac-mdio";
643 little-endian;
644 #address-cells = <1>;
645 #size-cells = <0>;
648 pcs8: ethernet-phy@0 {
654 compatible = "fsl,fman-memac-mdio";
656 little-endian;
657 #address-cells = <1>;
658 #size-cells = <0>;
661 pcs9: ethernet-phy@0 {
667 compatible = "fsl,fman-memac-mdio";
669 little-endian;
670 #address-cells = <1>;
671 #size-cells = <0>;
674 pcs10: ethernet-phy@0 {
680 compatible = "fsl,fman-memac-mdio";
682 little-endian;
683 #address-cells = <1>;
684 #size-cells = <0>;
687 pcs11: ethernet-phy@0 {
693 compatible = "fsl,fman-memac-mdio";
695 little-endian;
696 #address-cells = <1>;
697 #size-cells = <0>;
700 pcs12: ethernet-phy@0 {
706 compatible = "fsl,fman-memac-mdio";
708 little-endian;
709 #address-cells = <1>;
710 #size-cells = <0>;
713 pcs13: ethernet-phy@0 {
719 compatible = "fsl,fman-memac-mdio";
721 little-endian;
722 #address-cells = <1>;
723 #size-cells = <0>;
726 pcs14: ethernet-phy@0 {
732 compatible = "fsl,fman-memac-mdio";
734 little-endian;
735 #address-cells = <1>;
736 #size-cells = <0>;
739 pcs15: ethernet-phy@0 {
745 compatible = "fsl,fman-memac-mdio";
747 little-endian;
748 #address-cells = <1>;
749 #size-cells = <0>;
752 pcs16: ethernet-phy@0 {
757 fsl_mc: fsl-mc@80c000000 {
758 compatible = "fsl,qoriq-mc";
761 msi-parent = <&its 0>;
762 iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
763 dma-coherent;
764 #address-cells = <3>;
765 #size-cells = <1>;
768 * Region type 0x0 - MC portals
769 * Region type 0x1 - QBMAN portals
778 #address-cells = <1>;
779 #size-cells = <0>;
782 compatible = "fsl,qoriq-mc-dpmac";
784 pcs-handle = <&pcs1>;
788 compatible = "fsl,qoriq-mc-dpmac";
790 pcs-handle = <&pcs2>;
794 compatible = "fsl,qoriq-mc-dpmac";
796 pcs-handle = <&pcs3>;
800 compatible = "fsl,qoriq-mc-dpmac";
802 pcs-handle = <&pcs4>;
806 compatible = "fsl,qoriq-mc-dpmac";
808 pcs-handle = <&pcs5>;
812 compatible = "fsl,qoriq-mc-dpmac";
814 pcs-handle = <&pcs6>;
818 compatible = "fsl,qoriq-mc-dpmac";
820 pcs-handle = <&pcs7>;
824 compatible = "fsl,qoriq-mc-dpmac";
826 pcs-handle = <&pcs8>;
830 compatible = "fsl,qoriq-mc-dpmac";
832 pcs-handle = <&pcs9>;
836 compatible = "fsl,qoriq-mc-dpmac";
838 pcs-handle = <&pcs10>;
842 compatible = "fsl,qoriq-mc-dpmac";
844 pcs-handle = <&pcs11>;
848 compatible = "fsl,qoriq-mc-dpmac";
850 pcs-handle = <&pcs12>;
854 compatible = "fsl,qoriq-mc-dpmac";
856 pcs-handle = <&pcs13>;
860 compatible = "fsl,qoriq-mc-dpmac";
862 pcs-handle = <&pcs14>;
866 compatible = "fsl,qoriq-mc-dpmac";
868 pcs-handle = <&pcs15>;
872 compatible = "fsl,qoriq-mc-dpmac";
874 pcs-handle = <&pcs16>;
880 compatible = "arm,mmu-500";
882 #global-interrupts = <12>;
883 #iommu-cells = <1>;
884 stream-match-mask = <0x7C00>;
885 dma-coherent;
888 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, /* global non-secure fault */
889 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, /* combined non-secure interrupt */
890 /* performance counter interrupts 0-7 */
932 compatible = "fsl,ls2080a-dspi", "fsl,ls2085a-dspi";
933 #address-cells = <1>;
934 #size-cells = <0>;
939 clock-names = "dspi";
940 spi-num-chipselects = <5>;
945 compatible = "fsl,ls2080a-esdhc", "fsl,esdhc";
950 voltage-ranges = <1800 1800 3300 3300>;
951 sdhci,auto-cmd12;
952 little-endian;
953 bus-width = <4>;
957 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
960 gpio-controller;
961 little-endian;
962 #gpio-cells = <2>;
963 interrupt-controller;
964 #interrupt-cells = <2>;
968 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
971 gpio-controller;
972 little-endian;
973 #gpio-cells = <2>;
974 interrupt-controller;
975 #interrupt-cells = <2>;
979 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
982 gpio-controller;
983 little-endian;
984 #gpio-cells = <2>;
985 interrupt-controller;
986 #interrupt-cells = <2>;
990 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
993 gpio-controller;
994 little-endian;
995 #gpio-cells = <2>;
996 interrupt-controller;
997 #interrupt-cells = <2>;
1002 compatible = "fsl,vf610-i2c";
1003 #address-cells = <1>;
1004 #size-cells = <0>;
1007 clock-names = "ipg";
1014 compatible = "fsl,vf610-i2c";
1015 #address-cells = <1>;
1016 #size-cells = <0>;
1019 clock-names = "ipg";
1026 compatible = "fsl,vf610-i2c";
1027 #address-cells = <1>;
1028 #size-cells = <0>;
1031 clock-names = "ipg";
1038 compatible = "fsl,vf610-i2c";
1039 #address-cells = <1>;
1040 #size-cells = <0>;
1043 clock-names = "ipg";
1048 ifc: memory-controller@2240000 {
1052 little-endian;
1053 #address-cells = <2>;
1054 #size-cells = <1>;
1062 compatible = "fsl,ls2080a-qspi";
1063 #address-cells = <1>;
1064 #size-cells = <0>;
1067 reg-names = "QuadSPI", "QuadSPI-memory";
1073 clock-names = "qspi_en", "qspi";
1078 compatible = "fsl,ls2080a-pcie";
1079 reg-names = "regs", "config";
1081 interrupt-names = "intr";
1082 #address-cells = <3>;
1083 #size-cells = <2>;
1085 dma-coherent;
1086 num-viewport = <6>;
1087 bus-range = <0x0 0xff>;
1088 msi-parent = <&its 0>;
1089 #interrupt-cells = <1>;
1090 interrupt-map-mask = <0 0 0 7>;
1091 interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
1095 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1100 compatible = "fsl,ls2080a-pcie";
1101 reg-names = "regs", "config";
1103 interrupt-names = "intr";
1104 #address-cells = <3>;
1105 #size-cells = <2>;
1107 dma-coherent;
1108 num-viewport = <6>;
1109 bus-range = <0x0 0xff>;
1110 msi-parent = <&its 0>;
1111 #interrupt-cells = <1>;
1112 interrupt-map-mask = <0 0 0 7>;
1113 interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
1117 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1122 compatible = "fsl,ls2080a-pcie";
1123 reg-names = "regs", "config";
1125 interrupt-names = "intr";
1126 #address-cells = <3>;
1127 #size-cells = <2>;
1129 dma-coherent;
1130 num-viewport = <256>;
1131 bus-range = <0x0 0xff>;
1132 msi-parent = <&its 0>;
1133 #interrupt-cells = <1>;
1134 interrupt-map-mask = <0 0 0 7>;
1135 interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>,
1139 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1144 compatible = "fsl,ls2080a-pcie";
1145 reg-names = "regs", "config";
1147 interrupt-names = "intr";
1148 #address-cells = <3>;
1149 #size-cells = <2>;
1151 dma-coherent;
1152 num-viewport = <6>;
1153 bus-range = <0x0 0xff>;
1154 msi-parent = <&its 0>;
1155 #interrupt-cells = <1>;
1156 interrupt-map-mask = <0 0 0 7>;
1157 interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>,
1161 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1167 compatible = "fsl,ls2080a-ahci";
1172 dma-coherent;
1177 compatible = "fsl,ls2080a-ahci";
1182 dma-coherent;
1186 #address-cells = <2>;
1187 #size-cells = <2>;
1188 compatible = "simple-bus";
1190 dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
1197 snps,quirk-frame-length-adjustment = <0x20>;
1199 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
1208 snps,quirk-frame-length-adjustment = <0x20>;
1210 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
1216 compatible = "arm,ccn-504";
1221 rcpm: wakeup-controller@1e34040 {
1222 compatible = "fsl,ls208xa-rcpm", "fsl,qoriq-rcpm-2.1+";
1224 #fsl,rcpm-wakeup-cells = <6>;
1225 little-endian;
1229 compatible = "fsl,ls208xa-ftm-alarm";
1231 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0>;
1236 ddr1: memory-controller@1080000 {
1237 compatible = "fsl,qoriq-memory-controller";
1240 little-endian;
1243 ddr2: memory-controller@1090000 {
1244 compatible = "fsl,qoriq-memory-controller";
1247 little-endian;
1252 compatible = "linaro,optee-tz";