Lines Matching +full:min +full:- +full:residency +full:- +full:us

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3  * Device Tree Include file for Freescale Layerscape-2080A family SoC.
5  * Copyright 2014-2016 Freescale Semiconductor, Inc.
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include "fsl-ls208xa.dtsi"
17 		compatible = "arm,cortex-a57-pmu";
25 		compatible = "arm,cortex-a57";
28 		cpu-idle-states = <&CPU_PW20>;
29 		next-level-cache = <&cluster0_l2>;
30 		#cooling-cells = <2>;
35 		compatible = "arm,cortex-a57";
38 		cpu-idle-states = <&CPU_PW20>;
39 		next-level-cache = <&cluster0_l2>;
40 		#cooling-cells = <2>;
45 		compatible = "arm,cortex-a57";
48 		cpu-idle-states = <&CPU_PW20>;
49 		next-level-cache = <&cluster1_l2>;
50 		#cooling-cells = <2>;
55 		compatible = "arm,cortex-a57";
58 		cpu-idle-states = <&CPU_PW20>;
59 		next-level-cache = <&cluster1_l2>;
60 		#cooling-cells = <2>;
65 		compatible = "arm,cortex-a57";
68 		cpu-idle-states = <&CPU_PW20>;
69 		next-level-cache = <&cluster2_l2>;
70 		#cooling-cells = <2>;
75 		compatible = "arm,cortex-a57";
78 		cpu-idle-states = <&CPU_PW20>;
79 		next-level-cache = <&cluster2_l2>;
80 		#cooling-cells = <2>;
85 		compatible = "arm,cortex-a57";
88 		next-level-cache = <&cluster3_l2>;
89 		cpu-idle-states = <&CPU_PW20>;
90 		#cooling-cells = <2>;
95 		compatible = "arm,cortex-a57";
98 		cpu-idle-states = <&CPU_PW20>;
99 		next-level-cache = <&cluster3_l2>;
100 		#cooling-cells = <2>;
103 	cluster0_l2: l2-cache0 {
105 		cache-level = <2>;
106 		cache-unified;
109 	cluster1_l2: l2-cache1 {
111 		cache-level = <2>;
112 		cache-unified;
115 	cluster2_l2: l2-cache2 {
117 		cache-level = <2>;
118 		cache-unified;
121 	cluster3_l2: l2-cache3 {
123 		cache-level = <2>;
124 		cache-unified;
127 	CPU_PW20: cpu-pw20 {
128 		compatible = "arm,idle-state";
129 		idle-state-name = "PW20";
130 		arm,psci-suspend-param = <0x00010000>;
131 		entry-latency-us = <2000>;
132 		exit-latency-us = <2000>;
133 		min-residency-us = <6000>;
142 		  0x82000000 0x0 0x40000000 0x10 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
150 		  0x82000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
158 		  0x82000000 0x0 0x40000000 0x14 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
166 		  0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
170 	fsl,erratum-a008585;