Lines Matching +full:0 +full:x00010000

23 	cpu0: cpu@0 {
26 		reg = <0x0>;
27 		clocks = <&clockgen QORIQ_CLK_CMUX 0>;
36 		reg = <0x1>;
37 		clocks = <&clockgen QORIQ_CLK_CMUX 0>;
46 		reg = <0x100>;
56 		reg = <0x101>;
66 		reg = <0x200>;
76 		reg = <0x201>;
86 		reg = <0x300>;
96 		reg = <0x301>;
130 		arm,psci-suspend-param = <0x00010000>;
138 	reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
139 	      <0x10 0x00000000 0x0 0x00002000>; /* configuration space */
141 	ranges = <0x81000000 0x0 0x00000000 0x10 0x00010000 0x0 0x00010000   /* downstream I/O */
142 		  0x82000000 0x0 0x40000000 0x10 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
146 	reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
147 	      <0x12 0x00000000 0x0 0x00002000>; /* configuration space */
149 	ranges = <0x81000000 0x0 0x00000000 0x12 0x00010000 0x0 0x00010000   /* downstream I/O */
150 		  0x82000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
154 	reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
155 	      <0x14 0x00000000 0x0 0x00002000>; /* configuration space */
157 	ranges = <0x81000000 0x0 0x00000000 0x14 0x00010000 0x0 0x00010000   /* downstream I/O */
158 		  0x82000000 0x0 0x40000000 0x14 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
162 	reg = <0x00 0x03700000 0x0 0x00100000>, /* controller registers */
163 	      <0x16 0x00000000 0x0 0x00002000>; /* configuration space */
165 	ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000   /* downstream I/O */
166 		  0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */