Lines Matching +full:qoriq +full:- +full:sysclk +full:- +full:1
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
26 #address-cells = <1>;
27 #size-cells = <0>;
29 /* We have 2 clusters having 4 Cortex-A53 cores each */
32 compatible = "arm,cortex-a53";
35 cpu-idle-states = <&CPU_PH20>;
36 #cooling-cells = <2>;
39 cpu1: cpu@1 {
41 compatible = "arm,cortex-a53";
44 cpu-idle-states = <&CPU_PH20>;
45 #cooling-cells = <2>;
50 compatible = "arm,cortex-a53";
53 cpu-idle-states = <&CPU_PH20>;
54 #cooling-cells = <2>;
59 compatible = "arm,cortex-a53";
62 cpu-idle-states = <&CPU_PH20>;
63 #cooling-cells = <2>;
68 compatible = "arm,cortex-a53";
70 clocks = <&clockgen QORIQ_CLK_CMUX 1>;
71 cpu-idle-states = <&CPU_PH20>;
72 #cooling-cells = <2>;
77 compatible = "arm,cortex-a53";
79 clocks = <&clockgen QORIQ_CLK_CMUX 1>;
80 cpu-idle-states = <&CPU_PH20>;
81 #cooling-cells = <2>;
86 compatible = "arm,cortex-a53";
88 clocks = <&clockgen QORIQ_CLK_CMUX 1>;
89 cpu-idle-states = <&CPU_PH20>;
90 #cooling-cells = <2>;
95 compatible = "arm,cortex-a53";
97 clocks = <&clockgen QORIQ_CLK_CMUX 1>;
98 cpu-idle-states = <&CPU_PH20>;
99 #cooling-cells = <2>;
102 CPU_PH20: cpu-ph20 {
103 compatible = "arm,idle-state";
104 idle-state-name = "PH20";
105 arm,psci-suspend-param = <0x0>;
106 entry-latency-us = <1000>;
107 exit-latency-us = <1000>;
108 min-residency-us = <3000>;
112 gic: interrupt-controller@6000000 {
113 compatible = "arm,gic-v3";
114 #interrupt-cells = <3>;
115 interrupt-controller;
122 #address-cells = <2>;
123 #size-cells = <2>;
126 its: msi-controller@6020000 {
127 compatible = "arm,gic-v3-its";
128 msi-controller;
129 #msi-cells = <1>;
134 thermal-zones {
135 cluster-thermal {
136 polling-delay-passive = <1000>;
137 polling-delay = <5000>;
138 thermal-sensors = <&tmu 0>;
141 core_cluster_alert: core-cluster-alert {
147 core-cluster-crit {
154 cooling-maps {
157 cooling-device =
170 soc-thermal {
171 polling-delay-passive = <1000>;
172 polling-delay = <5000>;
173 thermal-sensors = <&tmu 1>;
176 soc-crit {
186 compatible = "arm,armv8-timer";
188 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
194 compatible = "arm,cortex-a53-pmu";
199 compatible = "arm,psci-0.2";
203 sysclk: sysclk { label
204 compatible = "fixed-clock";
205 #clock-cells = <0>;
206 clock-frequency = <100000000>;
207 clock-output-names = "sysclk";
211 compatible = "syscon-reboot";
218 compatible = "simple-bus";
219 #address-cells = <2>;
220 #size-cells = <2>;
222 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
225 compatible = "fsl,ls1088a-clockgen";
227 #clock-cells = <2>;
228 clocks = <&sysclk>;
231 dcfg: dcfg@1e00000 {
232 compatible = "fsl,ls1088a-dcfg", "syscon";
234 little-endian;
237 reset: syscon@1e60000 {
238 compatible = "fsl,ls1088a-reset", "syscon";
242 isc: syscon@1f70000 {
243 compatible = "fsl,ls1088a-isc", "syscon";
245 little-endian;
246 #address-cells = <1>;
247 #size-cells = <1>;
250 extirq: interrupt-controller@14 {
251 compatible = "fsl,ls1088a-extirq";
252 #interrupt-cells = <2>;
253 #address-cells = <0>;
254 interrupt-controller;
256 interrupt-map =
258 <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
269 interrupt-map-mask = <0xf 0x0>;
273 sfp: efuse@1e80000 {
274 compatible = "fsl,ls1028a-sfp";
278 clock-names = "sfp";
281 tmu: tmu@1f80000 {
282 compatible = "fsl,qoriq-tmu";
285 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;
286 fsl,tmu-calibration =
287 /* Calibration data group 1 */
328 little-endian;
329 #thermal-sensor-cells = <1>;
333 compatible = "fsl,ls1088a-dspi",
334 "fsl,ls1021a-v1.0-dspi";
335 #address-cells = <1>;
336 #size-cells = <0>;
339 clock-names = "dspi";
342 spi-num-chipselects = <6>;
365 compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
368 little-endian;
369 gpio-controller;
370 #gpio-cells = <2>;
371 interrupt-controller;
372 #interrupt-cells = <2>;
376 compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
379 little-endian;
380 gpio-controller;
381 #gpio-cells = <2>;
382 interrupt-controller;
383 #interrupt-cells = <2>;
387 compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
390 little-endian;
391 gpio-controller;
392 #gpio-cells = <2>;
393 interrupt-controller;
394 #interrupt-cells = <2>;
398 compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
401 little-endian;
402 gpio-controller;
403 #gpio-cells = <2>;
404 interrupt-controller;
405 #interrupt-cells = <2>;
408 ifc: memory-controller@2240000 {
412 little-endian;
413 #address-cells = <2>;
414 #size-cells = <1>;
419 compatible = "fsl,vf610-i2c";
420 #address-cells = <1>;
421 #size-cells = <0>;
430 compatible = "fsl,vf610-i2c";
431 #address-cells = <1>;
432 #size-cells = <0>;
441 compatible = "fsl,vf610-i2c";
442 #address-cells = <1>;
443 #size-cells = <0>;
452 compatible = "fsl,vf610-i2c";
453 #address-cells = <1>;
454 #size-cells = <0>;
463 compatible = "fsl,ls2080a-qspi";
464 #address-cells = <1>;
465 #size-cells = <0>;
468 reg-names = "QuadSPI", "QuadSPI-memory";
470 clock-names = "qspi_en", "qspi";
479 compatible = "fsl,ls1088a-esdhc", "fsl,esdhc";
482 clock-frequency = <0>;
483 clocks = <&clockgen QORIQ_CLK_HWACCEL 1>;
484 voltage-ranges = <1800 1800 3300 3300>;
485 sdhci,auto-cmd12;
486 little-endian;
487 bus-width = <4>;
496 snps,quirk-frame-length-adjustment = <0x20>;
498 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
507 snps,quirk-frame-length-adjustment = <0x20>;
509 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
514 compatible = "fsl,ls1088a-ahci";
517 reg-names = "ahci", "sata-ecc";
521 dma-coherent;
526 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
527 fsl,sec-era = <8>;
528 #address-cells = <1>;
529 #size-cells = <1>;
533 dma-coherent;
536 compatible = "fsl,sec-v5.0-job-ring",
537 "fsl,sec-v4.0-job-ring";
543 compatible = "fsl,sec-v5.0-job-ring",
544 "fsl,sec-v4.0-job-ring";
550 compatible = "fsl,sec-v5.0-job-ring",
551 "fsl,sec-v4.0-job-ring";
557 compatible = "fsl,sec-v5.0-job-ring",
558 "fsl,sec-v4.0-job-ring";
565 compatible = "fsl,ls1088a-pcie";
568 reg-names = "regs", "config";
570 interrupt-names = "aer";
571 #address-cells = <3>;
572 #size-cells = <2>;
574 dma-coherent;
575 num-viewport = <256>;
576 bus-range = <0x0 0xff>;
578 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
579 msi-parent = <&its 0>;
580 #interrupt-cells = <1>;
581 interrupt-map-mask = <0 0 0 7>;
582 interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>,
586 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
590 pcie_ep1: pcie-ep@3400000 {
591 compatible = "fsl,ls1088a-pcie-ep";
594 reg-names = "regs", "addr_space";
596 interrupt-names = "pme";
597 num-ib-windows = <24>;
598 num-ob-windows = <256>;
599 max-functions = /bits/ 8 <2>;
604 compatible = "fsl,ls1088a-pcie";
607 reg-names = "regs", "config";
609 interrupt-names = "aer";
610 #address-cells = <3>;
611 #size-cells = <2>;
613 dma-coherent;
614 num-viewport = <6>;
615 bus-range = <0x0 0xff>;
617 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
618 msi-parent = <&its 0>;
619 #interrupt-cells = <1>;
620 interrupt-map-mask = <0 0 0 7>;
621 interrupt-map = <0000 0 0 1 &gic 0 0 0 114 IRQ_TYPE_LEVEL_HIGH>,
625 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
629 pcie_ep2: pcie-ep@3500000 {
630 compatible = "fsl,ls1088a-pcie-ep";
633 reg-names = "regs", "addr_space";
635 interrupt-names = "pme";
636 num-ib-windows = <6>;
637 num-ob-windows = <6>;
642 compatible = "fsl,ls1088a-pcie";
645 reg-names = "regs", "config";
647 interrupt-names = "aer";
648 #address-cells = <3>;
649 #size-cells = <2>;
651 dma-coherent;
652 num-viewport = <6>;
653 bus-range = <0x0 0xff>;
655 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
656 msi-parent = <&its 0>;
657 #interrupt-cells = <1>;
658 interrupt-map-mask = <0 0 0 7>;
659 interrupt-map = <0000 0 0 1 &gic 0 0 0 119 IRQ_TYPE_LEVEL_HIGH>,
663 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
667 pcie_ep3: pcie-ep@3600000 {
668 compatible = "fsl,ls1088a-pcie-ep";
671 reg-names = "regs", "addr_space";
673 interrupt-names = "pme";
674 num-ib-windows = <6>;
675 num-ob-windows = <6>;
680 compatible = "arm,mmu-500";
682 #iommu-cells = <1>;
683 stream-match-mask = <0x7C00>;
684 dma-coherent;
685 #global-interrupts = <12>;
690 // global non-secure fault
692 // combined non-secure
694 // performance counter interrupts 0-7
771 compatible = "fsl,dpaa2-console";
775 ptp-timer@8b95000 {
776 compatible = "fsl,dpaa2-ptp";
779 QORIQ_CLK_PLL_DIV(1)>;
780 little-endian;
781 fsl,extts-fifo;
785 compatible = "fsl,fman-memac-mdio";
787 little-endian;
788 #address-cells = <1>;
789 #size-cells = <0>;
790 clock-frequency = <2500000>;
792 QORIQ_CLK_PLL_DIV(1)>;
797 compatible = "fsl,fman-memac-mdio";
799 little-endian;
800 #address-cells = <1>;
801 #size-cells = <0>;
802 clock-frequency = <2500000>;
804 QORIQ_CLK_PLL_DIV(1)>;
809 compatible = "fsl,fman-memac-mdio";
811 little-endian;
812 #address-cells = <1>;
813 #size-cells = <0>;
816 pcs1: ethernet-phy@0 {
822 compatible = "fsl,fman-memac-mdio";
824 little-endian;
825 #address-cells = <1>;
826 #size-cells = <0>;
829 pcs2: ethernet-phy@0 {
835 compatible = "fsl,fman-memac-mdio";
837 little-endian;
838 #address-cells = <1>;
839 #size-cells = <0>;
842 pcs3_0: ethernet-phy@0 {
846 pcs3_1: ethernet-phy@1 {
847 reg = <1>;
850 pcs3_2: ethernet-phy@2 {
854 pcs3_3: ethernet-phy@3 {
860 compatible = "fsl,fman-memac-mdio";
862 little-endian;
863 #address-cells = <1>;
864 #size-cells = <0>;
867 pcs7_0: ethernet-phy@0 {
871 pcs7_1: ethernet-phy@1 {
872 reg = <1>;
875 pcs7_2: ethernet-phy@2 {
879 pcs7_3: ethernet-phy@3 {
891 clock-names = "wdog_clk", "apb_pclk";
901 clock-names = "wdog_clk", "apb_pclk";
911 clock-names = "wdog_clk", "apb_pclk";
921 clock-names = "wdog_clk", "apb_pclk";
931 clock-names = "wdog_clk", "apb_pclk";
941 clock-names = "wdog_clk", "apb_pclk";
951 clock-names = "wdog_clk", "apb_pclk";
961 clock-names = "wdog_clk", "apb_pclk";
964 fsl_mc: fsl-mc@80c000000 {
965 compatible = "fsl,qoriq-mc";
968 msi-parent = <&its 0>;
969 iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
970 dma-coherent;
971 #address-cells = <3>;
972 #size-cells = <1>;
975 * Region type 0x0 - MC portals
976 * Region type 0x1 - QBMAN portals
982 #address-cells = <1>;
983 #size-cells = <0>;
985 dpmac1: ethernet@1 {
986 compatible = "fsl,qoriq-mc-dpmac";
987 reg = <1>;
991 compatible = "fsl,qoriq-mc-dpmac";
996 compatible = "fsl,qoriq-mc-dpmac";
1001 compatible = "fsl,qoriq-mc-dpmac";
1006 compatible = "fsl,qoriq-mc-dpmac";
1011 compatible = "fsl,qoriq-mc-dpmac";
1016 compatible = "fsl,qoriq-mc-dpmac";
1021 compatible = "fsl,qoriq-mc-dpmac";
1026 compatible = "fsl,qoriq-mc-dpmac";
1031 compatible = "fsl,qoriq-mc-dpmac";
1037 rcpm: wakeup-controller@1e34040 {
1038 compatible = "fsl,ls1088a-rcpm", "fsl,qoriq-rcpm-2.1+";
1040 #fsl,rcpm-wakeup-cells = <6>;
1041 little-endian;
1045 compatible = "fsl,ls1088a-ftm-alarm";
1047 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0>;
1054 compatible = "linaro,optee-tz";