Lines Matching +full:ifc +full:- +full:nand
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2017-2020 NXP
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
21 phy-handle = <&mdio2_aquantia_phy>;
22 phy-connection-type = "10gbase-r";
23 pcs-handle = <&pcs2>;
27 phy-handle = <&mdio1_phy5>;
28 phy-connection-type = "qsgmii";
29 managed = "in-band-status";
30 pcs-handle = <&pcs3_0>;
34 phy-handle = <&mdio1_phy6>;
35 phy-connection-type = "qsgmii";
36 managed = "in-band-status";
37 pcs-handle = <&pcs3_1>;
41 phy-handle = <&mdio1_phy7>;
42 phy-connection-type = "qsgmii";
43 managed = "in-band-status";
44 pcs-handle = <&pcs3_2>;
48 phy-handle = <&mdio1_phy8>;
49 phy-connection-type = "qsgmii";
50 managed = "in-band-status";
51 pcs-handle = <&pcs3_3>;
55 phy-handle = <&mdio1_phy1>;
56 phy-connection-type = "qsgmii";
57 managed = "in-band-status";
58 pcs-handle = <&pcs7_0>;
62 phy-handle = <&mdio1_phy2>;
63 phy-connection-type = "qsgmii";
64 managed = "in-band-status";
65 pcs-handle = <&pcs7_1>;
69 phy-handle = <&mdio1_phy3>;
70 phy-connection-type = "qsgmii";
71 managed = "in-band-status";
72 pcs-handle = <&pcs7_2>;
76 phy-handle = <&mdio1_phy4>;
77 phy-connection-type = "qsgmii";
78 managed = "in-band-status";
79 pcs-handle = <&pcs7_3>;
85 mdio1_phy5: ethernet-phy@c {
86 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
90 mdio1_phy6: ethernet-phy@d {
91 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
95 mdio1_phy7: ethernet-phy@e {
96 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
100 mdio1_phy8: ethernet-phy@f {
101 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
105 mdio1_phy1: ethernet-phy@1c {
106 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
110 mdio1_phy2: ethernet-phy@1d {
111 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
115 mdio1_phy3: ethernet-phy@1e {
116 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
120 mdio1_phy4: ethernet-phy@1f {
121 interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
129 mdio2_aquantia_phy: ethernet-phy@0 {
130 compatible = "ethernet-phy-ieee802.3-c45";
131 interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>;
139 i2c-mux@77 {
142 #address-cells = <1>;
143 #size-cells = <0>;
146 #address-cells = <1>;
147 #size-cells = <0>;
153 shunt-resistor = <1000>;
158 #address-cells = <1>;
159 #size-cells = <0>;
162 temp-sensor@4c {
170 /* IRQ_RTC_B -> IRQ0_B(CPLD) -> IRQ00(CPU), active low */
171 interrupts-extended = <&extirq 0 IRQ_TYPE_LEVEL_LOW>;
177 /* IRQ_RTC_B -> IRQ0_B(CPLD) -> IRQ00(CPU), active low */
178 interrupts-extended = <&extirq 0 IRQ_TYPE_LEVEL_LOW>;
184 &ifc {
189 nand@0,0 {
190 compatible = "fsl,ifc-nand";
194 fpga: board-control@2,0 {
195 compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
209 mmc-hs200-1_8v;
229 compatible = "jedec,spi-nor";
230 #address-cells = <1>;
231 #size-cells = <1>;
232 spi-max-frequency = <50000000>;
233 spi-rx-bus-width = <4>;
234 spi-tx-bus-width = <1>;
239 compatible = "jedec,spi-nor";
240 #address-cells = <1>;
241 #size-cells = <1>;
242 spi-max-frequency = <50000000>;
243 spi-rx-bus-width = <4>;
244 spi-tx-bus-width = <1>;