Lines Matching +full:psci +full:- +full:suspend +full:- +full:param
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 * We expect the enable-method for cpu's to be "psci", but this
43 * Currently supported enable-method is psci v0.2
47 compatible = "arm,cortex-a53";
50 next-level-cache = <&l2>;
51 cpu-idle-states = <&CPU_PH20>;
52 #cooling-cells = <2>;
57 compatible = "arm,cortex-a53";
60 next-level-cache = <&l2>;
61 cpu-idle-states = <&CPU_PH20>;
62 #cooling-cells = <2>;
67 compatible = "arm,cortex-a53";
70 next-level-cache = <&l2>;
71 cpu-idle-states = <&CPU_PH20>;
72 #cooling-cells = <2>;
77 compatible = "arm,cortex-a53";
80 next-level-cache = <&l2>;
81 cpu-idle-states = <&CPU_PH20>;
82 #cooling-cells = <2>;
85 l2: l2-cache {
87 cache-level = <2>;
88 cache-unified;
92 idle-states {
94 * PSCI node is not added default, U-boot will add missing
95 * parts if it determines to use PSCI.
97 entry-method = "psci";
99 CPU_PH20: cpu-ph20 {
100 compatible = "arm,idle-state";
101 idle-state-name = "PH20";
102 arm,psci-suspend-param = <0x0>;
103 entry-latency-us = <1000>;
104 exit-latency-us = <1000>;
105 min-residency-us = <3000>;
115 reserved-memory {
116 #address-cells = <2>;
117 #size-cells = <2>;
120 bman_fbpr: bman-fbpr {
121 compatible = "shared-dma-pool";
124 no-map;
127 qman_fqd: qman-fqd {
128 compatible = "shared-dma-pool";
131 no-map;
134 qman_pfdr: qman-pfdr {
135 compatible = "shared-dma-pool";
138 no-map;
143 compatible = "fixed-clock";
144 #clock-cells = <0>;
145 clock-frequency = <100000000>;
146 clock-output-names = "sysclk";
150 compatible = "syscon-reboot";
156 thermal-zones {
157 ddr-thermal {
158 polling-delay-passive = <1000>;
159 polling-delay = <5000>;
160 thermal-sensors = <&tmu 0>;
163 ddr-ctrler-alert {
169 ddr-ctrler-crit {
177 serdes-thermal {
178 polling-delay-passive = <1000>;
179 polling-delay = <5000>;
180 thermal-sensors = <&tmu 1>;
183 serdes-alert {
189 serdes-crit {
197 fman-thermal {
198 polling-delay-passive = <1000>;
199 polling-delay = <5000>;
200 thermal-sensors = <&tmu 2>;
203 fman-alert {
209 fman-crit {
217 cluster-thermal {
218 polling-delay-passive = <1000>;
219 polling-delay = <5000>;
220 thermal-sensors = <&tmu 3>;
223 core_cluster_alert: core-cluster-alert {
229 core_cluster_crit: core-cluster-crit {
236 cooling-maps {
239 cooling-device =
248 sec-thermal {
249 polling-delay-passive = <1000>;
250 polling-delay = <5000>;
251 thermal-sensors = <&tmu 4>;
254 sec-alert {
260 sec-crit {
270 compatible = "arm,armv8-timer";
275 fsl,erratum-a008585;
279 compatible = "arm,cortex-a53-pmu";
284 interrupt-affinity = <&cpu0>,
290 gic: interrupt-controller@1400000 {
291 compatible = "arm,gic-400";
292 #interrupt-cells = <3>;
293 interrupt-controller;
302 compatible = "simple-bus";
303 #address-cells = <2>;
304 #size-cells = <2>;
306 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
307 dma-coherent;
310 compatible = "fsl,ls1043a-clockgen";
312 #clock-cells = <2>;
317 compatible = "fsl,ls1043a-scfg", "syscon";
319 big-endian;
320 #address-cells = <1>;
321 #size-cells = <1>;
324 extirq: interrupt-controller@1ac {
325 compatible = "fsl,ls1043a-extirq";
326 #interrupt-cells = <2>;
327 #address-cells = <0>;
328 interrupt-controller;
330 interrupt-map =
343 interrupt-map-mask = <0xf 0x0>;
348 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
349 "fsl,sec-v4.0";
350 fsl,sec-era = <3>;
351 #address-cells = <1>;
352 #size-cells = <1>;
356 dma-coherent;
359 compatible = "fsl,sec-v5.4-job-ring",
360 "fsl,sec-v5.0-job-ring",
361 "fsl,sec-v4.0-job-ring";
367 compatible = "fsl,sec-v5.4-job-ring",
368 "fsl,sec-v5.0-job-ring",
369 "fsl,sec-v4.0-job-ring";
375 compatible = "fsl,sec-v5.4-job-ring",
376 "fsl,sec-v5.0-job-ring",
377 "fsl,sec-v4.0-job-ring";
383 compatible = "fsl,sec-v5.4-job-ring",
384 "fsl,sec-v5.0-job-ring",
385 "fsl,sec-v4.0-job-ring";
392 compatible = "fsl,ls1021a-sfp";
396 clock-names = "sfp";
400 compatible = "fsl,ls1043a-dcfg", "syscon";
402 big-endian;
405 ifc: memory-controller@1530000 {
412 compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
413 #address-cells = <1>;
414 #size-cells = <0>;
417 reg-names = "QuadSPI", "QuadSPI-memory";
419 clock-names = "qspi_en", "qspi";
428 compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
431 clock-frequency = <0>;
432 voltage-ranges = <1800 1800 3300 3300>;
433 sdhci,auto-cmd12;
434 bus-width = <4>;
437 ddr: memory-controller@1080000 {
438 compatible = "fsl,qoriq-memory-controller";
444 compatible = "fsl,qoriq-tmu";
447 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;
448 fsl,tmu-calibration =
489 #thermal-sensor-cells = <1>;
496 memory-region = <&qman_fqd &qman_pfdr>;
503 memory-region = <&bman_fbpr>;
506 bportals: bman-portals-bus@508000000 {
510 qportals: qman-portals-bus@500000000 {
515 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
516 #address-cells = <1>;
517 #size-cells = <0>;
520 clock-names = "dspi";
523 spi-num-chipselects = <5>;
524 big-endian;
529 compatible = "fsl,ls1043a-i2c", "fsl,vf610-i2c";
530 #address-cells = <1>;
531 #size-cells = <0>;
534 clock-names = "ipg";
539 dma-names = "rx", "tx";
544 compatible = "fsl,ls1043a-i2c", "fsl,vf610-i2c";
545 #address-cells = <1>;
546 #size-cells = <0>;
549 clock-names = "ipg";
552 scl-gpios = <&gpio4 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
555 dma-names = "rx", "tx";
560 compatible = "fsl,ls1043a-i2c", "fsl,vf610-i2c";
561 #address-cells = <1>;
562 #size-cells = <0>;
565 clock-names = "ipg";
568 scl-gpios = <&gpio4 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
571 dma-names = "rx", "tx";
576 compatible = "fsl,ls1043a-i2c", "fsl,vf610-i2c";
577 #address-cells = <1>;
578 #size-cells = <0>;
581 clock-names = "ipg";
584 scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
587 dma-names = "rx", "tx";
624 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
627 gpio-controller;
628 #gpio-cells = <2>;
629 interrupt-controller;
630 #interrupt-cells = <2>;
634 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
637 gpio-controller;
638 #gpio-cells = <2>;
639 interrupt-controller;
640 #interrupt-cells = <2>;
644 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
647 gpio-controller;
648 #gpio-cells = <2>;
649 interrupt-controller;
650 #interrupt-cells = <2>;
654 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
657 gpio-controller;
658 #gpio-cells = <2>;
659 interrupt-controller;
660 #interrupt-cells = <2>;
663 uqe: uqe-bus@2400000 {
664 #address-cells = <1>;
665 #size-cells = <1>;
666 compatible = "fsl,qe", "simple-bus";
669 brg-frequency = <100000000>;
670 bus-frequency = <200000000>;
671 fsl,qe-num-riscs = <1>;
672 fsl,qe-num-snums = <28>;
675 compatible = "fsl,qe-ic";
677 interrupt-controller;
678 #interrupt-cells = <1>;
684 compatible = "fsl,ls1043-qe-si",
685 "fsl,t1040-qe-si";
690 compatible = "fsl,ls1043-qe-siram",
691 "fsl,t1040-qe-siram";
696 cell-index = <1>;
699 interrupt-parent = <&qeic>;
703 cell-index = <3>;
706 interrupt-parent = <&qeic>;
710 #address-cells = <1>;
711 #size-cells = <1>;
712 compatible = "fsl,qe-muram", "fsl,cpm-muram";
715 data-only@0 {
716 compatible = "fsl,qe-muram-data",
717 "fsl,cpm-muram-data";
724 compatible = "fsl,ls1021a-lpuart";
728 clock-names = "ipg";
731 dma-names = "rx", "tx";
736 compatible = "fsl,ls1021a-lpuart";
741 clock-names = "ipg";
744 dma-names = "rx", "tx";
749 compatible = "fsl,ls1021a-lpuart";
754 clock-names = "ipg";
757 dma-names = "rx", "tx";
762 compatible = "fsl,ls1021a-lpuart";
767 clock-names = "ipg";
770 dma-names = "rx", "tx";
775 compatible = "fsl,ls1021a-lpuart";
780 clock-names = "ipg";
783 dma-names = "rx", "tx";
788 compatible = "fsl,ls1021a-lpuart";
793 clock-names = "ipg";
796 dma-names = "rx", "tx";
801 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
806 big-endian;
809 edma0: dma-controller@2c00000 {
810 #dma-cells = <2>;
811 compatible = "fsl,vf610-edma";
817 interrupt-names = "edma-tx", "edma-err";
818 dma-channels = <32>;
819 big-endian;
820 clock-names = "dmamux0", "dmamux1";
828 #address-cells = <2>;
829 #size-cells = <2>;
830 compatible = "simple-bus";
832 dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
839 snps,quirk-frame-length-adjustment = <0x20>;
841 usb3-lpm-capable;
842 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
851 snps,quirk-frame-length-adjustment = <0x20>;
853 usb3-lpm-capable;
854 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
863 snps,quirk-frame-length-adjustment = <0x20>;
865 usb3-lpm-capable;
866 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
871 compatible = "fsl,ls1043a-ahci";
874 reg-names = "ahci", "sata-ecc";
878 dma-coherent;
882 msi1: msi-controller1@1571000 {
883 compatible = "fsl,ls1043a-msi";
885 msi-controller;
889 msi2: msi-controller2@1572000 {
890 compatible = "fsl,ls1043a-msi";
892 msi-controller;
896 msi3: msi-controller3@1573000 {
897 compatible = "fsl,ls1043a-msi";
899 msi-controller;
904 compatible = "fsl,ls1043a-pcie";
907 reg-names = "regs", "config";
910 interrupt-names = "pme", "aer";
911 #address-cells = <3>;
912 #size-cells = <2>;
914 num-viewport = <6>;
915 bus-range = <0x0 0xff>;
917 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
918 msi-parent = <&msi1>, <&msi2>, <&msi3>;
919 #interrupt-cells = <1>;
920 interrupt-map-mask = <0 0 0 7>;
921 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
925 fsl,pcie-scfg = <&scfg 0>;
926 big-endian;
931 compatible = "fsl,ls1043a-pcie";
934 reg-names = "regs", "config";
937 interrupt-names = "pme", "aer";
938 #address-cells = <3>;
939 #size-cells = <2>;
941 num-viewport = <6>;
942 bus-range = <0x0 0xff>;
944 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
945 msi-parent = <&msi1>, <&msi2>, <&msi3>;
946 #interrupt-cells = <1>;
947 interrupt-map-mask = <0 0 0 7>;
948 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
952 fsl,pcie-scfg = <&scfg 1>;
953 big-endian;
958 compatible = "fsl,ls1043a-pcie";
961 reg-names = "regs", "config";
964 interrupt-names = "pme", "aer";
965 #address-cells = <3>;
966 #size-cells = <2>;
968 num-viewport = <6>;
969 bus-range = <0x0 0xff>;
971 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
972 msi-parent = <&msi1>, <&msi2>, <&msi3>;
973 #interrupt-cells = <1>;
974 interrupt-map-mask = <0 0 0 7>;
975 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
979 fsl,pcie-scfg = <&scfg 2>;
980 big-endian;
984 qdma: dma-controller@8380000 {
985 compatible = "fsl,ls1043a-qdma", "fsl,ls1021a-qdma";
994 interrupt-names = "qdma-error", "qdma-queue0",
995 "qdma-queue1", "qdma-queue2", "qdma-queue3";
996 #dma-cells = <1>;
997 dma-channels = <8>;
998 block-number = <1>;
999 block-offset = <0x10000>;
1000 fsl,dma-queues = <2>;
1001 status-sizes = <64>;
1002 queue-sizes = <64 64>;
1003 big-endian;
1006 rcpm: wakeup-controller@1ee2140 {
1007 compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1+";
1009 #fsl,rcpm-wakeup-cells = <1>;
1013 compatible = "fsl,ls1043a-ftm-alarm";
1015 fsl,rcpm-wakeup = <&rcpm 0x20000>;
1017 big-endian;
1023 compatible = "linaro,optee-tz";
1030 #include "qoriq-qman-portals.dtsi"
1031 #include "qoriq-bman-portals.dtsi"