Lines Matching +full:syscon +full:- +full:chipselects
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
23 #size-cells = <0>;
27 compatible = "arm,cortex-a72";
29 enable-method = "psci";
31 i-cache-size = <0xc000>;
32 i-cache-line-size = <64>;
33 i-cache-sets = <256>;
34 d-cache-size = <0x8000>;
35 d-cache-line-size = <64>;
36 d-cache-sets = <256>;
37 next-level-cache = <&l2>;
38 cpu-idle-states = <&CPU_PW20>;
39 #cooling-cells = <2>;
44 compatible = "arm,cortex-a72";
46 enable-method = "psci";
48 i-cache-size = <0xc000>;
49 i-cache-line-size = <64>;
50 i-cache-sets = <256>;
51 d-cache-size = <0x8000>;
52 d-cache-line-size = <64>;
53 d-cache-sets = <256>;
54 next-level-cache = <&l2>;
55 cpu-idle-states = <&CPU_PW20>;
56 #cooling-cells = <2>;
59 l2: l2-cache {
61 cache-level = <2>;
62 cache-unified;
63 cache-size = <0x100000>;
64 cache-line-size = <64>;
65 cache-sets = <1024>;
69 idle-states {
71 * PSCI node is not added default, U-boot will add missing
74 entry-method = "psci";
76 CPU_PW20: cpu-pw20 {
77 compatible = "arm,idle-state";
78 idle-state-name = "PW20";
79 arm,psci-suspend-param = <0x0>;
80 entry-latency-us = <2000>;
81 exit-latency-us = <2000>;
82 min-residency-us = <6000>;
86 rtc_clk: rtc-clk {
87 compatible = "fixed-clock";
88 #clock-cells = <0>;
89 clock-frequency = <32768>;
90 clock-output-names = "rtc_clk";
94 compatible = "fixed-clock";
95 #clock-cells = <0>;
96 clock-frequency = <100000000>;
97 clock-output-names = "sysclk";
100 osc_27m: clock-osc-27m {
101 compatible = "fixed-clock";
102 #clock-cells = <0>;
103 clock-frequency = <27000000>;
104 clock-output-names = "phy_27m";
109 compatible = "linaro,optee-tz";
116 compatible = "arm,armv8-timer";
128 compatible = "arm,cortex-a72-pmu";
132 gic: interrupt-controller@6000000 {
133 compatible = "arm,gic-v3";
134 #address-cells = <2>;
135 #size-cells = <2>;
139 #interrupt-cells = <3>;
140 interrupt-controller;
143 its: msi-controller@6020000 {
144 compatible = "arm,gic-v3-its";
145 msi-controller;
146 #msi-cells = <1>;
151 thermal-zones {
152 ddr-thermal {
153 polling-delay-passive = <1000>;
154 polling-delay = <5000>;
155 thermal-sensors = <&tmu 0>;
158 ddr-ctrler-alert {
164 ddr-ctrler-crit {
172 cluster-thermal {
173 polling-delay-passive = <1000>;
174 polling-delay = <5000>;
175 thermal-sensors = <&tmu 1>;
178 core_cluster_alert: core-cluster-alert {
184 core_cluster_crit: core-cluster-crit {
191 cooling-maps {
194 cooling-device =
203 compatible = "simple-bus";
204 #address-cells = <2>;
205 #size-cells = <2>;
208 ddr: memory-controller@1080000 {
209 compatible = "fsl,qoriq-memory-controller";
212 little-endian;
215 dcfg: syscon@1e00000 {
216 #address-cells = <1>;
217 #size-cells = <1>;
218 compatible = "fsl,ls1028a-dcfg", "syscon", "simple-mfd";
221 little-endian;
223 fspi_clk: clock-controller@900 {
224 compatible = "fsl,ls1028a-flexspi-clk";
226 #clock-cells = <0>;
228 clock-output-names = "fspi_clk";
232 syscon@1e60000 {
233 compatible = "fsl,ls1028a-reset", "syscon", "simple-mfd";
235 little-endian;
238 compatible = "syscon-reboot";
245 compatible = "fsl,ls1028a-sfp";
249 clock-names = "sfp";
250 #address-cells = <1>;
251 #size-cells = <1>;
253 ls1028a_uid: unique-id@1c {
258 scfg: syscon@1fc0000 {
259 compatible = "fsl,ls1028a-scfg", "syscon";
261 big-endian;
264 clockgen: clock-controller@1300000 {
265 compatible = "fsl,ls1028a-clockgen";
267 #clock-cells = <2>;
272 compatible = "fsl,vf610-i2c";
273 #address-cells = <1>;
274 #size-cells = <0>;
283 compatible = "fsl,vf610-i2c";
284 #address-cells = <1>;
285 #size-cells = <0>;
294 compatible = "fsl,vf610-i2c";
295 #address-cells = <1>;
296 #size-cells = <0>;
305 compatible = "fsl,vf610-i2c";
306 #address-cells = <1>;
307 #size-cells = <0>;
316 compatible = "fsl,vf610-i2c";
317 #address-cells = <1>;
318 #size-cells = <0>;
327 compatible = "fsl,vf610-i2c";
328 #address-cells = <1>;
329 #size-cells = <0>;
338 compatible = "fsl,vf610-i2c";
339 #address-cells = <1>;
340 #size-cells = <0>;
349 compatible = "fsl,vf610-i2c";
350 #address-cells = <1>;
351 #size-cells = <0>;
360 compatible = "nxp,lx2160a-fspi";
361 #address-cells = <1>;
362 #size-cells = <0>;
365 reg-names = "fspi_base", "fspi_mmap";
368 clock-names = "fspi_en", "fspi";
373 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
374 #address-cells = <1>;
375 #size-cells = <0>;
378 clock-names = "dspi";
382 dma-names = "tx", "rx";
383 spi-num-chipselects = <4>;
388 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
389 #address-cells = <1>;
390 #size-cells = <0>;
393 clock-names = "dspi";
397 dma-names = "tx", "rx";
398 spi-num-chipselects = <4>;
403 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
404 #address-cells = <1>;
405 #size-cells = <0>;
408 clock-names = "dspi";
412 dma-names = "tx", "rx";
413 spi-num-chipselects = <3>;
418 compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
421 clock-frequency = <0>; /* fixed up by bootloader */
423 voltage-ranges = <1800 1800 3300 3300>;
424 sdhci,auto-cmd12;
425 little-endian;
426 bus-width = <4>;
431 compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
434 clock-frequency = <0>; /* fixed up by bootloader */
436 voltage-ranges = <1800 1800>;
437 sdhci,auto-cmd12;
438 non-removable;
439 little-endian;
440 bus-width = <4>;
445 compatible = "fsl,lx2160ar1-flexcan";
452 clock-names = "ipg", "per";
457 compatible = "fsl,lx2160ar1-flexcan";
464 clock-names = "ipg", "per";
488 compatible = "fsl,ls1028a-lpuart";
493 clock-names = "ipg";
494 dma-names = "rx","tx";
501 compatible = "fsl,ls1028a-lpuart";
506 clock-names = "ipg";
507 dma-names = "rx","tx";
514 compatible = "fsl,ls1028a-lpuart";
519 clock-names = "ipg";
520 dma-names = "rx","tx";
527 compatible = "fsl,ls1028a-lpuart";
532 clock-names = "ipg";
533 dma-names = "rx","tx";
540 compatible = "fsl,ls1028a-lpuart";
545 clock-names = "ipg";
546 dma-names = "rx","tx";
553 compatible = "fsl,ls1028a-lpuart";
558 clock-names = "ipg";
559 dma-names = "rx","tx";
565 edma0: dma-controller@22c0000 {
566 #dma-cells = <2>;
567 compatible = "fsl,ls1028a-edma", "fsl,vf610-edma";
573 interrupt-names = "edma-tx", "edma-err";
574 dma-channels = <32>;
575 clock-names = "dmamux0", "dmamux1";
583 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
586 gpio-controller;
587 #gpio-cells = <2>;
588 interrupt-controller;
589 #interrupt-cells = <2>;
590 little-endian;
594 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
597 gpio-controller;
598 #gpio-cells = <2>;
599 interrupt-controller;
600 #interrupt-cells = <2>;
601 little-endian;
605 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
608 gpio-controller;
609 #gpio-cells = <2>;
610 interrupt-controller;
611 #interrupt-cells = <2>;
612 little-endian;
616 compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
620 snps,quirk-frame-length-adjustment = <0x20>;
621 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
626 compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
630 snps,quirk-frame-length-adjustment = <0x20>;
631 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
636 compatible = "fsl,ls1028a-ahci";
639 reg-names = "ahci", "sata-ecc";
647 compatible = "fsl,ls1028a-pcie";
650 reg-names = "regs", "config";
653 interrupt-names = "pme", "aer";
654 #address-cells = <3>;
655 #size-cells = <2>;
657 dma-coherent;
658 num-viewport = <8>;
659 bus-range = <0x0 0xff>;
661 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
662 msi-parent = <&its 0>;
663 #interrupt-cells = <1>;
664 interrupt-map-mask = <0 0 0 7>;
665 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
669 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
673 pcie_ep1: pcie-ep@3400000 {
674 compatible = "fsl,ls1028a-pcie-ep";
677 reg-names = "regs", "addr_space";
679 interrupt-names = "pme";
680 num-ib-windows = <6>;
681 num-ob-windows = <8>;
686 compatible = "fsl,ls1028a-pcie";
689 reg-names = "regs", "config";
692 interrupt-names = "pme", "aer";
693 #address-cells = <3>;
694 #size-cells = <2>;
696 dma-coherent;
697 num-viewport = <8>;
698 bus-range = <0x0 0xff>;
700 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
701 msi-parent = <&its 0>;
702 #interrupt-cells = <1>;
703 interrupt-map-mask = <0 0 0 7>;
704 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
708 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
712 pcie_ep2: pcie-ep@3500000 {
713 compatible = "fsl,ls1028a-pcie-ep";
716 reg-names = "regs", "addr_space";
718 interrupt-names = "pme";
719 num-ib-windows = <6>;
720 num-ob-windows = <8>;
725 compatible = "arm,mmu-500";
727 #global-interrupts = <8>;
728 #iommu-cells = <1>;
729 dma-coherent;
730 stream-match-mask = <0x7c00>;
735 /* global non-secure fault */
737 /* combined non-secure interrupt */
739 /* performance counter interrupts 0-7 */
778 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
779 fsl,sec-era = <10>;
780 #address-cells = <1>;
781 #size-cells = <1>;
785 dma-coherent;
788 compatible = "fsl,sec-v5.0-job-ring",
789 "fsl,sec-v4.0-job-ring";
795 compatible = "fsl,sec-v5.0-job-ring",
796 "fsl,sec-v4.0-job-ring";
802 compatible = "fsl,sec-v5.0-job-ring",
803 "fsl,sec-v4.0-job-ring";
809 compatible = "fsl,sec-v5.0-job-ring",
810 "fsl,sec-v4.0-job-ring";
816 qdma: dma-controller@8380000 {
817 compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";
826 interrupt-names = "qdma-error", "qdma-queue0",
827 "qdma-queue1", "qdma-queue2", "qdma-queue3";
828 #dma-cells = <1>;
829 dma-channels = <8>;
830 block-number = <1>;
831 block-offset = <0x10000>;
832 fsl,dma-queues = <2>;
833 status-sizes = <64>;
834 queue-sizes = <64 64>;
844 clock-names = "wdog_clk", "apb_pclk";
854 clock-names = "wdog_clk", "apb_pclk";
858 compatible = "arm,mali-dp500";
862 interrupt-names = "DE", "SE";
867 clock-names = "pxlclk", "mclk", "aclk", "pclk";
868 arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
869 arm,malidp-arqos-value = <0xd000d000>;
885 clock-names = "core", "shader", "bus";
886 #cooling-cells = <2>;
889 sai1: audio-controller@f100000 {
890 #sound-dai-cells = <0>;
891 compatible = "fsl,vf610-sai";
902 clock-names = "bus", "mclk1", "mclk2", "mclk3";
903 dma-names = "rx", "tx";
906 fsl,sai-asynchronous;
910 sai2: audio-controller@f110000 {
911 #sound-dai-cells = <0>;
912 compatible = "fsl,vf610-sai";
923 clock-names = "bus", "mclk1", "mclk2", "mclk3";
924 dma-names = "rx", "tx";
927 fsl,sai-asynchronous;
931 sai3: audio-controller@f120000 {
932 #sound-dai-cells = <0>;
933 compatible = "fsl,vf610-sai";
944 clock-names = "bus", "mclk1", "mclk2", "mclk3";
945 dma-names = "rx", "tx";
948 fsl,sai-asynchronous;
952 sai4: audio-controller@f130000 {
953 #sound-dai-cells = <0>;
954 compatible = "fsl,vf610-sai";
965 clock-names = "bus", "mclk1", "mclk2", "mclk3";
966 dma-names = "rx", "tx";
969 fsl,sai-asynchronous;
973 sai5: audio-controller@f140000 {
974 #sound-dai-cells = <0>;
975 compatible = "fsl,vf610-sai";
986 clock-names = "bus", "mclk1", "mclk2", "mclk3";
987 dma-names = "rx", "tx";
990 fsl,sai-asynchronous;
994 sai6: audio-controller@f150000 {
995 #sound-dai-cells = <0>;
996 compatible = "fsl,vf610-sai";
1007 clock-names = "bus", "mclk1", "mclk2", "mclk3";
1008 dma-names = "rx", "tx";
1011 fsl,sai-asynchronous;
1015 dpclk: clock-controller@f1f0000 {
1016 compatible = "fsl,ls1028a-plldig";
1018 #clock-cells = <0>;
1023 compatible = "fsl,qoriq-tmu";
1026 fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
1027 fsl,tmu-calibration =
1071 little-endian;
1072 #thermal-sensor-cells = <1>;
1076 compatible = "pci-host-ecam-generic";
1078 #address-cells = <3>;
1079 #size-cells = <2>;
1080 msi-parent = <&its 0>;
1082 bus-range = <0x0 0x0>;
1083 dma-coherent;
1084 msi-map = <0 &its 0x17 0xe>;
1085 iommu-map = <0 &smmu 0x17 0xe>;
1086 /* PF0-6 BAR0 - non-prefetchable memory */
1088 /* PF0-6 BAR2 - prefetchable memory */
1090 /* PF0: VF0-1 BAR0 - non-prefetchable memory */
1092 /* PF0: VF0-1 BAR2 - prefetchable memory */
1094 /* PF1: VF0-1 BAR0 - non-prefetchable memory */
1096 /* PF1: VF0-1 BAR2 - prefetchable memory */
1098 /* BAR4 (PF5) - non-prefetchable memory */
1100 #interrupt-cells = <1>;
1101 interrupt-map-mask = <0 0 0 7>;
1102 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
1120 phy-mode = "internal";
1123 fixed-link {
1125 full-duplex;
1131 compatible = "pci1957,ee01", "fsl,enetc-mdio";
1133 #address-cells = <1>;
1134 #size-cells = <0>;
1138 compatible = "pci1957,ee02", "fsl,enetc-ptp";
1141 little-endian;
1142 fsl,extts-fifo;
1145 mscc_felix: ethernet-switch@0,5 {
1152 #address-cells = <1>;
1153 #size-cells = <0>;
1179 phy-mode = "internal";
1183 fixed-link {
1185 full-duplex;
1192 phy-mode = "internal";
1196 fixed-link {
1198 full-duplex;
1208 phy-mode = "internal";
1211 fixed-link {
1213 full-duplex;
1227 compatible = "fsl,ls1028a-enetc-ierb";
1232 compatible = "fsl,vf610-ftm-pwm";
1233 #pwm-cells = <3>;
1235 clock-names = "ftm_sys", "ftm_ext",
1243 compatible = "fsl,vf610-ftm-pwm";
1244 #pwm-cells = <3>;
1246 clock-names = "ftm_sys", "ftm_ext",
1254 compatible = "fsl,vf610-ftm-pwm";
1255 #pwm-cells = <3>;
1257 clock-names = "ftm_sys", "ftm_ext",
1265 compatible = "fsl,vf610-ftm-pwm";
1266 #pwm-cells = <3>;
1268 clock-names = "ftm_sys", "ftm_ext",
1276 compatible = "fsl,vf610-ftm-pwm";
1277 #pwm-cells = <3>;
1279 clock-names = "ftm_sys", "ftm_ext",
1287 compatible = "fsl,vf610-ftm-pwm";
1288 #pwm-cells = <3>;
1290 clock-names = "ftm_sys", "ftm_ext",
1298 compatible = "fsl,vf610-ftm-pwm";
1299 #pwm-cells = <3>;
1301 clock-names = "ftm_sys", "ftm_ext",
1309 compatible = "fsl,vf610-ftm-pwm";
1310 #pwm-cells = <3>;
1312 clock-names = "ftm_sys", "ftm_ext",
1319 rcpm: wakeup-controller@1e34040 {
1320 compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+";
1322 #fsl,rcpm-wakeup-cells = <7>;
1323 little-endian;
1327 compatible = "fsl,ls1028a-ftm-alarm";
1329 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
1335 compatible = "fsl,ls1028a-ftm-alarm";
1337 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;