Lines Matching +full:0 +full:x00010008
23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
31 i-cache-size = <0xc000>;
34 d-cache-size = <0x8000>;
45 reg = <0x1>;
47 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
48 i-cache-size = <0xc000>;
51 d-cache-size = <0x8000>;
63 cache-size = <0x100000>;
79 arm,psci-suspend-param = <0x0>;
88 #clock-cells = <0>;
95 #clock-cells = <0>;
102 #clock-cells = <0>;
137 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
138 <0x0 0x06040000 0 0x40000>; /* GIC Redistributor */
141 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
147 reg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */
155 thermal-sensors = <&tmu 0>;
210 reg = <0x0 0x1080000 0x0 0x1000>;
219 reg = <0x0 0x1e00000 0x0 0x10000>;
220 ranges = <0x0 0x0 0x1e00000 0x10000>;
225 reg = <0x900 0x4>;
226 #clock-cells = <0>;
227 clocks = <&clockgen QORIQ_CLK_HWACCEL 0>;
234 reg = <0x0 0x1e60000 0x0 0x10000>;
239 offset = <0>;
240 mask = <0x02>;
246 reg = <0x0 0x1e80000 0x0 0x10000>;
254 reg = <0x1c 0x8>;
260 reg = <0x0 0x1fc0000 0x0 0x10000>;
266 reg = <0x0 0x1300000 0x0 0xa0000>;
274 #size-cells = <0>;
275 reg = <0x0 0x2000000 0x0 0x10000>;
285 #size-cells = <0>;
286 reg = <0x0 0x2010000 0x0 0x10000>;
296 #size-cells = <0>;
297 reg = <0x0 0x2020000 0x0 0x10000>;
307 #size-cells = <0>;
308 reg = <0x0 0x2030000 0x0 0x10000>;
318 #size-cells = <0>;
319 reg = <0x0 0x2040000 0x0 0x10000>;
329 #size-cells = <0>;
330 reg = <0x0 0x2050000 0x0 0x10000>;
340 #size-cells = <0>;
341 reg = <0x0 0x2060000 0x0 0x10000>;
351 #size-cells = <0>;
352 reg = <0x0 0x2070000 0x0 0x10000>;
362 #size-cells = <0>;
363 reg = <0x0 0x20c0000 0x0 0x10000>,
364 <0x0 0x20000000 0x0 0x10000000>;
373 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
375 #size-cells = <0>;
376 reg = <0x0 0x2100000 0x0 0x10000>;
381 dmas = <&edma0 0 62>, <&edma0 0 60>;
388 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
390 #size-cells = <0>;
391 reg = <0x0 0x2110000 0x0 0x10000>;
396 dmas = <&edma0 0 58>, <&edma0 0 56>;
403 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
405 #size-cells = <0>;
406 reg = <0x0 0x2120000 0x0 0x10000>;
411 dmas = <&edma0 0 54>, <&edma0 0 2>;
419 reg = <0x0 0x2140000 0x0 0x10000>;
421 clock-frequency = <0>; /* fixed up by bootloader */
432 reg = <0x0 0x2150000 0x0 0x10000>;
434 clock-frequency = <0>; /* fixed up by bootloader */
446 reg = <0x0 0x2180000 0x0 0x10000>;
458 reg = <0x0 0x2190000 0x0 0x10000>;
470 reg = <0x00 0x21c0500 0x0 0x100>;
479 reg = <0x00 0x21c0600 0x0 0x100>;
489 reg = <0x0 0x2260000 0x0 0x1000>;
502 reg = <0x0 0x2270000 0x0 0x1000>;
515 reg = <0x0 0x2280000 0x0 0x1000>;
528 reg = <0x0 0x2290000 0x0 0x1000>;
541 reg = <0x0 0x22a0000 0x0 0x1000>;
554 reg = <0x0 0x22b0000 0x0 0x1000>;
568 reg = <0x0 0x22c0000 0x0 0x10000>,
569 <0x0 0x22d0000 0x0 0x10000>,
570 <0x0 0x22e0000 0x0 0x10000>;
584 reg = <0x0 0x2300000 0x0 0x10000>;
595 reg = <0x0 0x2310000 0x0 0x10000>;
606 reg = <0x0 0x2320000 0x0 0x10000>;
617 reg = <0x0 0x3100000 0x0 0x10000>;
620 snps,quirk-frame-length-adjustment = <0x20>;
627 reg = <0x0 0x3110000 0x0 0x10000>;
630 snps,quirk-frame-length-adjustment = <0x20>;
637 reg = <0x0 0x3200000 0x0 0x10000>,
638 <0x7 0x100520 0x0 0x4>;
648 reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
649 <0x80 0x00000000 0x0 0x00002000>; /* configuration space */
659 bus-range = <0x0 0xff>;
660 ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 /* downstream I/O */
661 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
662 msi-parent = <&its 0>;
664 interrupt-map-mask = <0 0 0 7>;
665 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
666 <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
667 <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
668 <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
669 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
675 reg = <0x00 0x03400000 0x0 0x00100000
676 0x80 0x00000000 0x8 0x00000000>;
687 reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
688 <0x88 0x00000000 0x0 0x00002000>; /* configuration space */
698 bus-range = <0x0 0xff>;
699 ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000 /* downstream I/O */
700 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
701 msi-parent = <&its 0>;
703 interrupt-map-mask = <0 0 0 7>;
704 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
705 <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
706 <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
707 <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
708 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
714 reg = <0x00 0x03500000 0x0 0x00100000
715 0x88 0x00000000 0x8 0x00000000>;
726 reg = <0 0x5000000 0 0x800000>;
730 stream-match-mask = <0x7c00>;
739 /* performance counter interrupts 0-7 */
778 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
782 ranges = <0x0 0x00 0x8000000 0x100000>;
783 reg = <0x00 0x8000000 0x0 0x100000>;
788 compatible = "fsl,sec-v5.0-job-ring",
789 "fsl,sec-v4.0-job-ring";
790 reg = <0x10000 0x10000>;
795 compatible = "fsl,sec-v5.0-job-ring",
796 "fsl,sec-v4.0-job-ring";
797 reg = <0x20000 0x10000>;
802 compatible = "fsl,sec-v5.0-job-ring",
803 "fsl,sec-v4.0-job-ring";
804 reg = <0x30000 0x10000>;
809 compatible = "fsl,sec-v5.0-job-ring",
810 "fsl,sec-v4.0-job-ring";
811 reg = <0x40000 0x10000>;
818 reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
819 <0x0 0x8390000 0x0 0x10000>, /* Status regs */
820 <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
831 block-offset = <0x10000>;
839 reg = <0x0 0xc000000 0x0 0x1000>;
849 reg = <0x0 0xc010000 0x0 0x1000>;
859 reg = <0x0 0xf080000 0x0 0x10000>;
869 arm,malidp-arqos-value = <0xd000d000>;
880 reg = <0x0 0xf0c0000 0x0 0x10000>;
890 #sound-dai-cells = <0>;
892 reg = <0x0 0xf100000 0x0 0x10000>;
911 #sound-dai-cells = <0>;
913 reg = <0x0 0xf110000 0x0 0x10000>;
932 #sound-dai-cells = <0>;
934 reg = <0x0 0xf120000 0x0 0x10000>;
953 #sound-dai-cells = <0>;
955 reg = <0x0 0xf130000 0x0 0x10000>;
974 #sound-dai-cells = <0>;
976 reg = <0x0 0xf140000 0x0 0x10000>;
995 #sound-dai-cells = <0>;
997 reg = <0x0 0xf150000 0x0 0x10000>;
1017 reg = <0x0 0xf1f0000 0x0 0x10000>;
1018 #clock-cells = <0>;
1024 reg = <0x0 0x1f80000 0x0 0x10000>;
1026 fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
1028 <0x00000000 0x00000024>,
1029 <0x00000001 0x0000002b>,
1030 <0x00000002 0x00000031>,
1031 <0x00000003 0x00000038>,
1032 <0x00000004 0x0000003f>,
1033 <0x00000005 0x00000045>,
1034 <0x00000006 0x0000004c>,
1035 <0x00000007 0x00000053>,
1036 <0x00000008 0x00000059>,
1037 <0x00000009 0x00000060>,
1038 <0x0000000a 0x00000066>,
1039 <0x0000000b 0x0000006d>,
1041 <0x00010000 0x0000001c>,
1042 <0x00010001 0x00000024>,
1043 <0x00010002 0x0000002c>,
1044 <0x00010003 0x00000035>,
1045 <0x00010004 0x0000003d>,
1046 <0x00010005 0x00000045>,
1047 <0x00010006 0x0000004d>,
1048 <0x00010007 0x00000055>,
1049 <0x00010008 0x0000005e>,
1050 <0x00010009 0x00000066>,
1051 <0x0001000a 0x0000006e>,
1053 <0x00020000 0x00000018>,
1054 <0x00020001 0x00000022>,
1055 <0x00020002 0x0000002d>,
1056 <0x00020003 0x00000038>,
1057 <0x00020004 0x00000043>,
1058 <0x00020005 0x0000004d>,
1059 <0x00020006 0x00000058>,
1060 <0x00020007 0x00000063>,
1061 <0x00020008 0x0000006e>,
1063 <0x00030000 0x00000010>,
1064 <0x00030001 0x0000001c>,
1065 <0x00030002 0x00000029>,
1066 <0x00030003 0x00000036>,
1067 <0x00030004 0x00000042>,
1068 <0x00030005 0x0000004f>,
1069 <0x00030006 0x0000005b>,
1070 <0x00030007 0x00000068>;
1077 reg = <0x01 0xf0000000 0x0 0x100000>;
1080 msi-parent = <&its 0>;
1082 bus-range = <0x0 0x0>;
1084 msi-map = <0 &its 0x17 0xe>;
1085 iommu-map = <0 &smmu 0x17 0xe>;
1087 ranges = <0x82000000 0x1 0xf8000000 0x1 0xf8000000 0x0 0x160000
1089 0xc2000000 0x1 0xf8160000 0x1 0xf8160000 0x0 0x070000
1091 0x82000000 0x1 0xf81d0000 0x1 0xf81d0000 0x0 0x020000
1093 0xc2000000 0x1 0xf81f0000 0x1 0xf81f0000 0x0 0x020000
1095 0x82000000 0x1 0xf8210000 0x1 0xf8210000 0x0 0x020000
1097 0xc2000000 0x1 0xf8230000 0x1 0xf8230000 0x0 0x020000
1099 0x82000000 0x1 0xfc000000 0x1 0xfc000000 0x0 0x400000>;
1101 interrupt-map-mask = <0 0 0 7>;
1102 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
1103 <0000 0 0 2 &gic 0 0 GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
1105 enetc_port0: ethernet@0,0 {
1107 reg = <0x000000 0 0 0 0>;
1111 enetc_port1: ethernet@0,1 {
1113 reg = <0x000100 0 0 0 0>;
1117 enetc_port2: ethernet@0,2 {
1119 reg = <0x000200 0 0 0 0>;
1130 enetc_mdio_pf3: mdio@0,3 {
1132 reg = <0x000300 0 0 0 0>;
1134 #size-cells = <0>;
1137 ethernet@0,4 {
1139 reg = <0x000400 0 0 0 0>;
1145 mscc_felix: ethernet-switch@0,5 {
1146 reg = <0x000500 0 0 0 0>;
1153 #size-cells = <0>;
1156 mscc_felix_port0: port@0 {
1157 reg = <0>;
1205 enetc_port3: ethernet@0,6 {
1207 reg = <0x000600 0 0 0 0>;
1218 rcec@1f,0 {
1219 reg = <0x00f800 0 0 0 0>;
1228 reg = <0x01 0xf0800000 0x0 0x10000>;
1234 reg = <0x0 0x2800000 0x0 0x10000>;
1245 reg = <0x0 0x2810000 0x0 0x10000>;
1256 reg = <0x0 0x2820000 0x0 0x10000>;
1267 reg = <0x0 0x2830000 0x0 0x10000>;
1278 reg = <0x0 0x2840000 0x0 0x10000>;
1289 reg = <0x0 0x2850000 0x0 0x10000>;
1300 reg = <0x0 0x2860000 0x0 0x10000>;
1311 reg = <0x0 0x2870000 0x0 0x10000>;
1321 reg = <0x0 0x1e34040 0x0 0x1c>;
1328 reg = <0x0 0x2800000 0x0 0x10000>;
1329 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
1336 reg = <0x0 0x2810000 0x0 0x10000>;
1337 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;