Lines Matching +full:10 +full:- +full:bits
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2019-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
9 #include <dt-bindings/clock/google,gs101.h>
10 #include <dt-bindings/clock/google,gs101-acpm.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/soc/samsung,exynos-usi.h>
17 #address-cells = <2>;
18 #size-cells = <1>;
20 interrupt-parent = <&gic>;
34 #address-cells = <1>;
35 #size-cells = <0>;
37 cpu-map {
74 compatible = "arm,cortex-a55";
77 enable-method = "psci";
78 cpu-idle-states = <&ananke_cpu_sleep>;
79 capacity-dmips-mhz = <250>;
80 dynamic-power-coefficient = <70>;
81 operating-points-v2 = <&cpucl0_opp_table>;
86 compatible = "arm,cortex-a55";
89 enable-method = "psci";
90 cpu-idle-states = <&ananke_cpu_sleep>;
91 capacity-dmips-mhz = <250>;
92 dynamic-power-coefficient = <70>;
93 operating-points-v2 = <&cpucl0_opp_table>;
98 compatible = "arm,cortex-a55";
101 enable-method = "psci";
102 cpu-idle-states = <&ananke_cpu_sleep>;
103 capacity-dmips-mhz = <250>;
104 dynamic-power-coefficient = <70>;
105 operating-points-v2 = <&cpucl0_opp_table>;
110 compatible = "arm,cortex-a55";
113 enable-method = "psci";
114 cpu-idle-states = <&ananke_cpu_sleep>;
115 capacity-dmips-mhz = <250>;
116 dynamic-power-coefficient = <70>;
117 operating-points-v2 = <&cpucl0_opp_table>;
122 compatible = "arm,cortex-a76";
125 enable-method = "psci";
126 cpu-idle-states = <&enyo_cpu_sleep>;
127 capacity-dmips-mhz = <620>;
128 dynamic-power-coefficient = <284>;
129 operating-points-v2 = <&cpucl1_opp_table>;
134 compatible = "arm,cortex-a76";
137 enable-method = "psci";
138 cpu-idle-states = <&enyo_cpu_sleep>;
139 capacity-dmips-mhz = <620>;
140 dynamic-power-coefficient = <284>;
141 operating-points-v2 = <&cpucl1_opp_table>;
146 compatible = "arm,cortex-x1";
149 enable-method = "psci";
150 cpu-idle-states = <&hera_cpu_sleep>;
151 capacity-dmips-mhz = <1024>;
152 dynamic-power-coefficient = <650>;
153 operating-points-v2 = <&cpucl2_opp_table>;
158 compatible = "arm,cortex-x1";
161 enable-method = "psci";
162 cpu-idle-states = <&hera_cpu_sleep>;
163 capacity-dmips-mhz = <1024>;
164 dynamic-power-coefficient = <650>;
165 operating-points-v2 = <&cpucl2_opp_table>;
168 idle-states {
169 entry-method = "psci";
171 ananke_cpu_sleep: cpu-ananke-sleep {
172 idle-state-name = "c2";
173 compatible = "arm,idle-state";
174 arm,psci-suspend-param = <0x0010000>;
175 local-timer-stop;
176 entry-latency-us = <70>;
177 exit-latency-us = <160>;
178 min-residency-us = <2000>;
181 enyo_cpu_sleep: cpu-enyo-sleep {
182 idle-state-name = "c2";
183 compatible = "arm,idle-state";
184 arm,psci-suspend-param = <0x0010000>;
185 local-timer-stop;
186 entry-latency-us = <150>;
187 exit-latency-us = <190>;
188 min-residency-us = <2500>;
191 hera_cpu_sleep: cpu-hera-sleep {
192 idle-state-name = "c2";
193 compatible = "arm,idle-state";
194 arm,psci-suspend-param = <0x0010000>;
195 local-timer-stop;
196 entry-latency-us = <235>;
197 exit-latency-us = <220>;
198 min-residency-us = <3500>;
203 cpucl0_opp_table: opp-table-0 {
204 compatible = "operating-points-v2";
205 opp-shared;
207 opp-300000000 {
208 opp-hz = /bits/ 64 <300000000>;
209 opp-microvolt = <537500>;
210 clock-latency-ns = <500000>;
213 opp-574000000 {
214 opp-hz = /bits/ 64 <574000000>;
215 opp-microvolt = <600000>;
216 clock-latency-ns = <500000>;
219 opp-738000000 {
220 opp-hz = /bits/ 64 <738000000>;
221 opp-microvolt = <618750>;
222 clock-latency-ns = <500000>;
225 opp-930000000 {
226 opp-hz = /bits/ 64 <930000000>;
227 opp-microvolt = <668750>;
228 clock-latency-ns = <500000>;
231 opp-1098000000 {
232 opp-hz = /bits/ 64 <1098000000>;
233 opp-microvolt = <712500>;
234 clock-latency-ns = <500000>;
237 opp-1197000000 {
238 opp-hz = /bits/ 64 <1197000000>;
239 opp-microvolt = <731250>;
240 clock-latency-ns = <500000>;
243 opp-1328000000 {
244 opp-hz = /bits/ 64 <1328000000>;
245 opp-microvolt = <762500>;
246 clock-latency-ns = <500000>;
249 opp-1401000000 {
250 opp-hz = /bits/ 64 <1401000000>;
251 opp-microvolt = <781250>;
252 clock-latency-ns = <500000>;
255 opp-1598000000 {
256 opp-hz = /bits/ 64 <1598000000>;
257 opp-microvolt = <831250>;
258 clock-latency-ns = <500000>;
261 opp-1704000000 {
262 opp-hz = /bits/ 64 <1704000000>;
263 opp-microvolt = <862500>;
264 clock-latency-ns = <500000>;
267 opp-1803000000 {
268 opp-hz = /bits/ 64 <1803000000>;
269 opp-microvolt = <906250>;
270 clock-latency-ns = <500000>;
274 cpucl1_opp_table: opp-table-1 {
275 compatible = "operating-points-v2";
276 opp-shared;
278 opp-400000000 {
279 opp-hz = /bits/ 64 <400000000>;
280 opp-microvolt = <506250>;
281 clock-latency-ns = <500000>;
284 opp-553000000 {
285 opp-hz = /bits/ 64 <553000000>;
286 opp-microvolt = <537500>;
287 clock-latency-ns = <500000>;
290 opp-696000000 {
291 opp-hz = /bits/ 64 <696000000>;
292 opp-microvolt = <562500>;
293 clock-latency-ns = <500000>;
296 opp-799000000 {
297 opp-hz = /bits/ 64 <799000000>;
298 opp-microvolt = <581250>;
299 clock-latency-ns = <500000>;
302 opp-910000000 {
303 opp-hz = /bits/ 64 <910000000>;
304 opp-microvolt = <606250>;
305 clock-latency-ns = <500000>;
308 opp-1024000000 {
309 opp-hz = /bits/ 64 <1024000000>;
310 opp-microvolt = <625000>;
311 clock-latency-ns = <500000>;
314 opp-1197000000 {
315 opp-hz = /bits/ 64 <1197000000>;
316 opp-microvolt = <662500>;
317 clock-latency-ns = <500000>;
320 opp-1328000000 {
321 opp-hz = /bits/ 64 <1328000000>;
322 opp-microvolt = <687500>;
323 clock-latency-ns = <500000>;
326 opp-1491000000 {
327 opp-hz = /bits/ 64 <1491000000>;
328 opp-microvolt = <731250>;
329 clock-latency-ns = <500000>;
332 opp-1663000000 {
333 opp-hz = /bits/ 64 <1663000000>;
334 opp-microvolt = <775000>;
335 clock-latency-ns = <500000>;
338 opp-1836000000 {
339 opp-hz = /bits/ 64 <1836000000>;
340 opp-microvolt = <818750>;
341 clock-latency-ns = <500000>;
344 opp-1999000000 {
345 opp-hz = /bits/ 64 <1999000000>;
346 opp-microvolt = <868750>;
347 clock-latency-ns = <500000>;
350 opp-2130000000 {
351 opp-hz = /bits/ 64 <2130000000>;
352 opp-microvolt = <918750>;
353 clock-latency-ns = <500000>;
356 opp-2253000000 {
357 opp-hz = /bits/ 64 <2253000000>;
358 opp-microvolt = <968750>;
359 clock-latency-ns = <500000>;
363 cpucl2_opp_table: opp-table-2 {
364 compatible = "operating-points-v2";
365 opp-shared;
367 opp-500000000 {
368 opp-hz = /bits/ 64 <500000000>;
369 opp-microvolt = <500000>;
370 clock-latency-ns = <500000>;
373 opp-851000000 {
374 opp-hz = /bits/ 64 <851000000>;
375 opp-microvolt = <556250>;
376 clock-latency-ns = <500000>;
379 opp-984000000 {
380 opp-hz = /bits/ 64 <984000000>;
381 opp-microvolt = <575000>;
382 clock-latency-ns = <500000>;
385 opp-1106000000 {
386 opp-hz = /bits/ 64 <1106000000>;
387 opp-microvolt = <606250>;
388 clock-latency-ns = <500000>;
391 opp-1277000000 {
392 opp-hz = /bits/ 64 <1277000000>;
393 opp-microvolt = <631250>;
394 clock-latency-ns = <500000>;
397 opp-1426000000 {
398 opp-hz = /bits/ 64 <1426000000>;
399 opp-microvolt = <662500>;
400 clock-latency-ns = <500000>;
403 opp-1582000000 {
404 opp-hz = /bits/ 64 <1582000000>;
405 opp-microvolt = <693750>;
406 clock-latency-ns = <500000>;
409 opp-1745000000 {
410 opp-hz = /bits/ 64 <1745000000>;
411 opp-microvolt = <731250>;
412 clock-latency-ns = <500000>;
415 opp-1826000000 {
416 opp-hz = /bits/ 64 <1826000000>;
417 opp-microvolt = <750000>;
418 clock-latency-ns = <500000>;
421 opp-2048000000 {
422 opp-hz = /bits/ 64 <2048000000>;
423 opp-microvolt = <793750>;
424 clock-latency-ns = <500000>;
427 opp-2188000000 {
428 opp-hz = /bits/ 64 <2188000000>;
429 opp-microvolt = <831250>;
430 clock-latency-ns = <500000>;
433 opp-2252000000 {
434 opp-hz = /bits/ 64 <2252000000>;
435 opp-microvolt = <850000>;
436 clock-latency-ns = <500000>;
439 opp-2401000000 {
440 opp-hz = /bits/ 64 <2401000000>;
441 opp-microvolt = <887500>;
442 clock-latency-ns = <500000>;
445 opp-2507000000 {
446 opp-hz = /bits/ 64 <2507000000>;
447 opp-microvolt = <925000>;
448 clock-latency-ns = <500000>;
451 opp-2630000000 {
452 opp-hz = /bits/ 64 <2630000000>;
453 opp-microvolt = <968750>;
454 clock-latency-ns = <500000>;
457 opp-2704000000 {
458 opp-hz = /bits/ 64 <2704000000>;
459 opp-microvolt = <1000000>;
460 clock-latency-ns = <500000>;
463 opp-2802000000 {
464 opp-hz = /bits/ 64 <2802000000>;
465 opp-microvolt = <1056250>;
466 clock-latency-ns = <500000>;
474 ext_24_5m: clock-1 {
475 compatible = "fixed-clock";
476 #clock-cells = <0>;
477 clock-output-names = "oscclk";
480 ext_200m: clock-2 {
481 compatible = "fixed-clock";
482 #clock-cells = <0>;
483 clock-output-names = "ext-200m";
487 acpm_ipc: power-management {
488 compatible = "google,gs101-acpm-ipc";
489 #clock-cells = <1>;
495 pmu-0 {
496 compatible = "arm,cortex-a55-pmu";
500 pmu-1 {
501 compatible = "arm,cortex-a76-pmu";
505 pmu-2 {
506 compatible = "arm,cortex-x1-pmu";
510 pmu-3 {
511 compatible = "arm,dsu-pmu";
518 compatible = "arm,psci-1.0";
522 reserved_memory: reserved-memory {
523 #address-cells = <2>;
524 #size-cells = <1>;
529 no-map;
532 tpu_fw_reserved: tpu-fw@93000000 {
534 no-map;
539 no-map;
544 no-map;
547 dss_log_reserved: dss-log-reserved@fd3f0000 {
549 no-map;
552 debug_kinfo_reserved: debug-kinfo-reserved@fd3fe000 {
554 no-map;
557 bldr_log_reserved: bldr-log-reserved@fd800000 {
559 no-map;
562 bldr_log_hist_reserved: bldr-log-hist-reserved@fd900000 {
564 no-map;
569 compatible = "simple-bus";
570 #address-cells = <1>;
571 #size-cells = <1>;
574 cmu_misc: clock-controller@10010000 {
575 compatible = "google,gs101-cmu-misc";
577 #clock-cells = <1>;
580 clock-names = "bus", "sss";
584 compatible = "google,gs101-misc-sysreg", "syscon";
590 compatible = "google,gs101-mct",
591 "samsung,exynos4210-mct";
594 clock-names = "fin_pll", "mct";
610 compatible = "google,gs101-wdt";
614 clock-names = "watchdog", "watchdog_src";
616 samsung,syscon-phandle = <&pmu_system_controller>;
617 samsung,cluster-index = <0>;
622 compatible = "google,gs101-wdt";
626 clock-names = "watchdog", "watchdog_src";
628 samsung,syscon-phandle = <&pmu_system_controller>;
629 samsung,cluster-index = <1>;
633 gic: interrupt-controller@10400000 {
634 compatible = "arm,gic-v3";
635 #address-cells = <0>;
636 #interrupt-cells = <4>;
637 interrupt-controller;
642 ppi-partitions {
643 ppi_cluster0: interrupt-partition-0 {
647 ppi_cluster1: interrupt-partition-1 {
651 ppi_cluster2: interrupt-partition-2 {
657 cmu_peric0: clock-controller@10800000 {
658 compatible = "google,gs101-cmu-peric0";
660 #clock-cells = <1>;
664 clock-names = "oscclk", "bus", "ip";
668 compatible = "google,gs101-peric0-sysreg", "syscon";
674 compatible = "google,gs101-pinctrl";
677 clock-names = "pclk";
682 compatible = "google,gs101-usi", "samsung,exynos850-usi";
685 #address-cells = <1>;
686 #size-cells = <1>;
689 clock-names = "pclk", "ipclk";
694 compatible = "google,gs101-hsi2c",
695 "samsung,exynosautov9-hsi2c";
697 #address-cells = <1>;
698 #size-cells = <0>;
701 clock-names = "hsi2c", "hsi2c_pclk";
703 pinctrl-0 = <&hsi2c1_bus>;
704 pinctrl-names = "default";
709 compatible = "google,gs101-uart";
713 clock-names = "uart", "clk_uart_baud0";
715 pinctrl-0 = <&uart1_bus_single>;
716 pinctrl-names = "default";
717 samsung,uart-fifosize = <64>;
722 compatible = "google,gs101-spi";
724 #address-cells = <1>;
725 #size-cells = <0>;
728 clock-names = "spi", "spi_busclk0";
730 pinctrl-0 = <&spi1_bus>;
731 pinctrl-names = "default";
737 compatible = "google,gs101-usi", "samsung,exynos850-usi";
740 #address-cells = <1>;
741 #size-cells = <1>;
744 clock-names = "pclk", "ipclk";
749 compatible = "google,gs101-hsi2c",
750 "samsung,exynosautov9-hsi2c";
752 #address-cells = <1>;
753 #size-cells = <0>;
756 clock-names = "hsi2c", "hsi2c_pclk";
758 pinctrl-0 = <&hsi2c2_bus>;
759 pinctrl-names = "default";
764 compatible = "google,gs101-uart";
768 clock-names = "uart", "clk_uart_baud0";
770 pinctrl-0 = <&uart2_bus_single>;
771 pinctrl-names = "default";
772 samsung,uart-fifosize = <64>;
777 compatible = "google,gs101-spi";
779 #address-cells = <1>;
780 #size-cells = <0>;
783 clock-names = "spi", "spi_busclk0";
785 pinctrl-0 = <&spi2_bus>;
786 pinctrl-names = "default";
792 compatible = "google,gs101-usi", "samsung,exynos850-usi";
795 #address-cells = <1>;
796 #size-cells = <1>;
799 clock-names = "pclk", "ipclk";
804 compatible = "google,gs101-hsi2c",
805 "samsung,exynosautov9-hsi2c";
807 #address-cells = <1>;
808 #size-cells = <0>;
811 clock-names = "hsi2c", "hsi2c_pclk";
813 pinctrl-0 = <&hsi2c3_bus>;
814 pinctrl-names = "default";
819 compatible = "google,gs101-uart";
823 clock-names = "uart", "clk_uart_baud0";
825 pinctrl-0 = <&uart3_bus_single>;
826 pinctrl-names = "default";
827 samsung,uart-fifosize = <64>;
832 compatible = "google,gs101-spi";
834 #address-cells = <1>;
835 #size-cells = <0>;
838 clock-names = "spi", "spi_busclk0";
840 pinctrl-0 = <&spi3_bus>;
841 pinctrl-names = "default";
847 compatible = "google,gs101-usi", "samsung,exynos850-usi";
850 #address-cells = <1>;
851 #size-cells = <1>;
854 clock-names = "pclk", "ipclk";
859 compatible = "google,gs101-hsi2c",
860 "samsung,exynosautov9-hsi2c";
862 #address-cells = <1>;
863 #size-cells = <0>;
866 clock-names = "hsi2c", "hsi2c_pclk";
868 pinctrl-0 = <&hsi2c4_bus>;
869 pinctrl-names = "default";
874 compatible = "google,gs101-uart";
878 clock-names = "uart", "clk_uart_baud0";
880 pinctrl-0 = <&uart4_bus_single>;
881 pinctrl-names = "default";
882 samsung,uart-fifosize = <64>;
887 compatible = "google,gs101-spi";
889 #address-cells = <1>;
890 #size-cells = <0>;
893 clock-names = "spi", "spi_busclk0";
895 pinctrl-0 = <&spi4_bus>;
896 pinctrl-names = "default";
902 compatible = "google,gs101-usi", "samsung,exynos850-usi";
905 #address-cells = <1>;
906 #size-cells = <1>;
909 clock-names = "pclk", "ipclk";
914 compatible = "google,gs101-hsi2c",
915 "samsung,exynosautov9-hsi2c";
917 #address-cells = <1>;
918 #size-cells = <0>;
921 clock-names = "hsi2c", "hsi2c_pclk";
923 pinctrl-0 = <&hsi2c5_bus>;
924 pinctrl-names = "default";
929 compatible = "google,gs101-uart";
933 clock-names = "uart", "clk_uart_baud0";
935 pinctrl-0 = <&uart5_bus_single>;
936 pinctrl-names = "default";
937 samsung,uart-fifosize = <64>;
942 compatible = "google,gs101-spi";
944 #address-cells = <1>;
945 #size-cells = <0>;
948 clock-names = "spi", "spi_busclk0";
950 pinctrl-0 = <&spi5_bus>;
951 pinctrl-names = "default";
957 compatible = "google,gs101-usi", "samsung,exynos850-usi";
960 #address-cells = <1>;
961 #size-cells = <1>;
964 clock-names = "pclk", "ipclk";
969 compatible = "google,gs101-hsi2c",
970 "samsung,exynosautov9-hsi2c";
972 #address-cells = <1>;
973 #size-cells = <0>;
976 clock-names = "hsi2c", "hsi2c_pclk";
978 pinctrl-0 = <&hsi2c6_bus>;
979 pinctrl-names = "default";
984 compatible = "google,gs101-uart";
988 clock-names = "uart", "clk_uart_baud0";
990 pinctrl-0 = <&uart6_bus_single>;
991 pinctrl-names = "default";
992 samsung,uart-fifosize = <64>;
997 compatible = "google,gs101-spi";
999 #address-cells = <1>;
1000 #size-cells = <0>;
1003 clock-names = "spi", "spi_busclk0";
1005 pinctrl-0 = <&spi6_bus>;
1006 pinctrl-names = "default";
1012 compatible = "google,gs101-usi", "samsung,exynos850-usi";
1015 #address-cells = <1>;
1016 #size-cells = <1>;
1019 clock-names = "pclk", "ipclk";
1024 compatible = "google,gs101-hsi2c",
1025 "samsung,exynosautov9-hsi2c";
1027 #address-cells = <1>;
1028 #size-cells = <0>;
1031 clock-names = "hsi2c", "hsi2c_pclk";
1033 pinctrl-0 = <&hsi2c7_bus>;
1034 pinctrl-names = "default";
1039 compatible = "google,gs101-uart";
1043 clock-names = "uart", "clk_uart_baud0";
1045 pinctrl-0 = <&uart7_bus_single>;
1046 pinctrl-names = "default";
1047 samsung,uart-fifosize = <64>;
1052 compatible = "google,gs101-spi";
1054 #address-cells = <1>;
1055 #size-cells = <0>;
1058 clock-names = "spi", "spi_busclk0";
1060 pinctrl-0 = <&spi7_bus>;
1061 pinctrl-names = "default";
1067 compatible = "google,gs101-usi", "samsung,exynos850-usi";
1070 #address-cells = <1>;
1071 #size-cells = <1>;
1074 clock-names = "pclk", "ipclk";
1079 compatible = "google,gs101-hsi2c",
1080 "samsung,exynosautov9-hsi2c";
1082 #address-cells = <1>;
1083 #size-cells = <0>;
1086 clock-names = "hsi2c", "hsi2c_pclk";
1088 pinctrl-0 = <&hsi2c8_bus>;
1089 pinctrl-names = "default";
1094 compatible = "google,gs101-uart";
1098 clock-names = "uart", "clk_uart_baud0";
1100 pinctrl-0 = <&uart8_bus_single>;
1101 pinctrl-names = "default";
1102 samsung,uart-fifosize = <64>;
1107 compatible = "google,gs101-spi";
1109 #address-cells = <1>;
1110 #size-cells = <0>;
1113 clock-names = "spi", "spi_busclk0";
1115 pinctrl-0 = <&spi8_bus>;
1116 pinctrl-names = "default";
1121 usi_uart: usi@10a000c0 {
1122 compatible = "google,gs101-usi", "samsung,exynos850-usi";
1125 #address-cells = <1>;
1126 #size-cells = <1>;
1129 clock-names = "pclk", "ipclk";
1134 serial_0: serial@10a00000 {
1135 compatible = "google,gs101-uart";
1139 clock-names = "uart", "clk_uart_baud0";
1141 pinctrl-0 = <&uart0_bus>;
1142 pinctrl-names = "default";
1143 samsung,uart-fifosize = <256>;
1148 usi14: usi@10a200c0 {
1149 compatible = "google,gs101-usi", "samsung,exynos850-usi";
1152 #address-cells = <1>;
1153 #size-cells = <1>;
1156 clock-names = "pclk", "ipclk";
1160 hsi2c_14: i2c@10a20000 {
1161 compatible = "google,gs101-hsi2c",
1162 "samsung,exynosautov9-hsi2c";
1164 #address-cells = <1>;
1165 #size-cells = <0>;
1168 clock-names = "hsi2c", "hsi2c_pclk";
1170 pinctrl-0 = <&hsi2c14_bus>;
1171 pinctrl-names = "default";
1175 serial_14: serial@10a20000 {
1176 compatible = "google,gs101-uart";
1180 clock-names = "uart", "clk_uart_baud0";
1182 pinctrl-0 = <&uart14_bus_single>;
1183 pinctrl-names = "default";
1184 samsung,uart-fifosize = <64>;
1188 spi_14: spi@10a20000 {
1189 compatible = "google,gs101-spi";
1191 #address-cells = <1>;
1192 #size-cells = <0>;
1195 clock-names = "spi", "spi_busclk0";
1197 pinctrl-0 = <&spi14_bus>;
1198 pinctrl-names = "default";
1203 cmu_peric1: clock-controller@10c00000 {
1204 compatible = "google,gs101-cmu-peric1";
1206 #clock-cells = <1>;
1210 clock-names = "oscclk", "bus", "ip";
1213 sysreg_peric1: syscon@10c20000 {
1214 compatible = "google,gs101-peric1-sysreg", "syscon";
1219 pinctrl_peric1: pinctrl@10c40000 {
1220 compatible = "google,gs101-pinctrl";
1223 clock-names = "pclk";
1227 usi0: usi@10d100c0 {
1228 compatible = "google,gs101-usi", "samsung,exynos850-usi";
1231 #address-cells = <1>;
1232 #size-cells = <1>;
1235 clock-names = "pclk", "ipclk";
1239 hsi2c_0: i2c@10d10000 {
1240 compatible = "google,gs101-hsi2c",
1241 "samsung,exynosautov9-hsi2c";
1243 #address-cells = <1>;
1244 #size-cells = <0>;
1247 clock-names = "hsi2c", "hsi2c_pclk";
1249 pinctrl-0 = <&hsi2c0_bus>;
1250 pinctrl-names = "default";
1254 serial_usi0: serial@10d10000 {
1255 compatible = "google,gs101-uart";
1259 clock-names = "uart", "clk_uart_baud0";
1261 pinctrl-0 = <&uart0_bus_single>;
1262 pinctrl-names = "default";
1263 samsung,uart-fifosize = <64>;
1267 spi_0: spi@10d10000 {
1268 compatible = "google,gs101-spi";
1270 #address-cells = <1>;
1271 #size-cells = <0>;
1274 clock-names = "spi", "spi_busclk0";
1276 pinctrl-0 = <&spi0_bus>;
1277 pinctrl-names = "default";
1282 usi9: usi@10d200c0 {
1283 compatible = "google,gs101-usi", "samsung,exynos850-usi";
1286 #address-cells = <1>;
1287 #size-cells = <1>;
1290 clock-names = "pclk", "ipclk";
1294 hsi2c_9: i2c@10d20000 {
1295 compatible = "google,gs101-hsi2c",
1296 "samsung,exynosautov9-hsi2c";
1298 #address-cells = <1>;
1299 #size-cells = <0>;
1302 clock-names = "hsi2c", "hsi2c_pclk";
1304 pinctrl-0 = <&hsi2c9_bus>;
1305 pinctrl-names = "default";
1309 serial_9: serial@10d20000 {
1310 compatible = "google,gs101-uart";
1314 clock-names = "uart", "clk_uart_baud0";
1316 pinctrl-0 = <&uart9_bus_single>;
1317 pinctrl-names = "default";
1318 samsung,uart-fifosize = <64>;
1322 spi_9: spi@10d20000 {
1323 compatible = "google,gs101-spi";
1325 #address-cells = <1>;
1326 #size-cells = <0>;
1329 clock-names = "spi", "spi_busclk0";
1331 pinctrl-0 = <&spi9_bus>;
1332 pinctrl-names = "default";
1337 usi10: usi@10d300c0 {
1338 compatible = "google,gs101-usi", "samsung,exynos850-usi";
1341 #address-cells = <1>;
1342 #size-cells = <1>;
1345 clock-names = "pclk", "ipclk";
1349 hsi2c_10: i2c@10d30000 {
1350 compatible = "google,gs101-hsi2c",
1351 "samsung,exynosautov9-hsi2c";
1353 #address-cells = <1>;
1354 #size-cells = <0>;
1357 clock-names = "hsi2c", "hsi2c_pclk";
1359 pinctrl-0 = <&hsi2c10_bus>;
1360 pinctrl-names = "default";
1364 serial_10: serial@10d30000 {
1365 compatible = "google,gs101-uart";
1369 clock-names = "uart", "clk_uart_baud0";
1371 pinctrl-0 = <&uart10_bus_single>;
1372 pinctrl-names = "default";
1373 samsung,uart-fifosize = <64>;
1377 spi_10: spi@10d30000 {
1378 compatible = "google,gs101-spi";
1380 #address-cells = <1>;
1381 #size-cells = <0>;
1384 clock-names = "spi", "spi_busclk0";
1386 pinctrl-0 = <&spi10_bus>;
1387 pinctrl-names = "default";
1392 usi11: usi@10d400c0 {
1393 compatible = "google,gs101-usi", "samsung,exynos850-usi";
1396 #address-cells = <1>;
1397 #size-cells = <1>;
1400 clock-names = "pclk", "ipclk";
1404 hsi2c_11: i2c@10d40000 {
1405 compatible = "google,gs101-hsi2c",
1406 "samsung,exynosautov9-hsi2c";
1408 #address-cells = <1>;
1409 #size-cells = <0>;
1412 clock-names = "hsi2c", "hsi2c_pclk";
1414 pinctrl-0 = <&hsi2c11_bus>;
1415 pinctrl-names = "default";
1419 serial_11: serial@10d40000 {
1420 compatible = "google,gs101-uart";
1424 clock-names = "uart", "clk_uart_baud0";
1426 pinctrl-0 = <&uart11_bus_single>;
1427 pinctrl-names = "default";
1428 samsung,uart-fifosize = <64>;
1432 spi_11: spi@10d40000 {
1433 compatible = "google,gs101-spi";
1435 #address-cells = <1>;
1436 #size-cells = <0>;
1439 clock-names = "spi", "spi_busclk0";
1441 pinctrl-0 = <&spi11_bus>;
1442 pinctrl-names = "default";
1447 usi12: usi@10d500c0 {
1448 compatible = "google,gs101-usi", "samsung,exynos850-usi";
1451 #address-cells = <1>;
1452 #size-cells = <1>;
1455 clock-names = "pclk", "ipclk";
1459 hsi2c_12: i2c@10d50000 {
1460 compatible = "google,gs101-hsi2c",
1461 "samsung,exynosautov9-hsi2c";
1463 #address-cells = <1>;
1464 #size-cells = <0>;
1467 clock-names = "hsi2c", "hsi2c_pclk";
1469 pinctrl-0 = <&hsi2c12_bus>;
1470 pinctrl-names = "default";
1474 serial_12: serial@10d50000 {
1475 compatible = "google,gs101-uart";
1479 clock-names = "uart", "clk_uart_baud0";
1481 pinctrl-0 = <&uart12_bus_single>;
1482 pinctrl-names = "default";
1483 samsung,uart-fifosize = <64>;
1487 spi_12: spi@10d50000 {
1488 compatible = "google,gs101-spi";
1490 #address-cells = <1>;
1491 #size-cells = <0>;
1494 clock-names = "spi", "spi_busclk0";
1496 pinctrl-0 = <&spi12_bus>;
1497 pinctrl-names = "default";
1502 usi13: usi@10d600c0 {
1503 compatible = "google,gs101-usi", "samsung,exynos850-usi";
1506 #address-cells = <1>;
1507 #size-cells = <1>;
1510 clock-names = "pclk", "ipclk";
1514 hsi2c_13: i2c@10d60000 {
1515 compatible = "google,gs101-hsi2c",
1516 "samsung,exynosautov9-hsi2c";
1518 #address-cells = <1>;
1519 #size-cells = <0>;
1522 clock-names = "hsi2c", "hsi2c_pclk";
1524 pinctrl-0 = <&hsi2c13_bus>;
1525 pinctrl-names = "default";
1529 serial_13: serial@10d60000 {
1530 compatible = "google,gs101-uart";
1534 clock-names = "uart", "clk_uart_baud0";
1536 pinctrl-0 = <&uart13_bus_single>;
1537 pinctrl-names = "default";
1538 samsung,uart-fifosize = <64>;
1542 spi_13: spi@10d60000 {
1543 compatible = "google,gs101-spi";
1545 #address-cells = <1>;
1546 #size-cells = <0>;
1549 clock-names = "spi", "spi_busclk0";
1551 pinctrl-0 = <&spi13_bus>;
1552 pinctrl-names = "default";
1557 cmu_hsi0: clock-controller@11000000 {
1558 compatible = "google,gs101-cmu-hsi0";
1560 #clock-cells = <1>;
1567 clock-names = "oscclk", "bus", "dpgtc", "usb31drd",
1572 compatible = "google,gs101-hsi0-sysreg", "syscon";
1578 compatible = "google,gs101-usb31drd-phy";
1582 reg-names = "phy", "pcs", "pma";
1588 clock-names = "phy", "ref", "ctrl_aclk", "ctrl_pclk", "scl_pclk";
1589 #phy-cells = <1>;
1590 samsung,pmu-syscon = <&pmu_system_controller>;
1595 compatible = "google,gs101-dwusb3";
1601 clock-names = "bus_early", "susp_clk", "link_aclk", "link_pclk";
1602 #address-cells = <1>;
1603 #size-cells = <1>;
1610 clock-names = "ref";
1613 phy-names = "usb2-phy", "usb3-phy";
1614 snps,has-lpm-erratum;
1622 compatible = "google,gs101-pinctrl";
1626 clock-names = "pclk";
1630 cmu_hsi2: clock-controller@14400000 {
1631 compatible = "google,gs101-cmu-hsi2";
1633 #clock-cells = <1>;
1639 clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
1643 compatible = "google,gs101-hsi2-sysreg", "syscon";
1649 compatible = "google,gs101-pinctrl";
1652 clock-names = "pclk";
1657 compatible = "google,gs101-ufs";
1662 reg-names = "hci", "vs_hci", "unipro", "ufsp";
1670 clock-names = "core_clk", "sclk_unipro_main", "fmp",
1672 dma-coherent;
1673 freq-table-hz = <0 0>, <0 0>, <0 0>, <0 0>, <0 0>, <0 0>;
1674 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
1675 pinctrl-names = "default";
1677 phy-names = "ufs-phy";
1683 compatible = "google,gs101-ufs-phy";
1685 reg-names = "phy-pma";
1686 samsung,pmu-syscon = <&pmu_system_controller>;
1687 #phy-cells = <0>;
1689 clock-names = "ref_clk";
1693 cmu_apm: clock-controller@17400000 {
1694 compatible = "google,gs101-cmu-apm";
1696 #clock-cells = <1>;
1699 clock-names = "oscclk";
1703 compatible = "google,gs101-apm-sysreg", "syscon";
1707 pmu_system_controller: system-controller@17460000 {
1708 compatible = "google,gs101-pmu", "syscon";
1710 google,pmu-intr-gen-syscon = <&pmu_intr_gen>;
1712 poweroff: syscon-poweroff {
1713 compatible = "syscon-poweroff";
1719 reboot: syscon-reboot {
1720 compatible = "google,gs101-reboot";
1723 reboot-mode {
1724 compatible = "syscon-reboot-mode";
1726 mode-bootloader = <0xfc>;
1727 mode-charge = <0x0a>;
1728 mode-dm-verity-device-corrupted = <0x50>;
1729 mode-fastboot = <0xfa>;
1730 mode-reboot-ab-update = <0x52>;
1731 mode-recovery = <0xff>;
1732 mode-rescue = <0xf9>;
1733 mode-shutdown-thermal = <0x51>;
1734 mode-shutdown-thermal-battery = <0x51>;
1739 compatible = "google,gs101-pmu-intr-gen", "syscon";
1744 compatible = "google,gs101-pinctrl";
1747 clock-names = "pclk";
1749 wakeup-interrupt-controller {
1750 compatible = "google,gs101-wakeup-eint",
1751 "samsung,exynos850-wakeup-eint",
1752 "samsung,exynos7-wakeup-eint";
1757 compatible = "google,gs101-pinctrl";
1760 clock-names = "pclk";
1762 wakeup-interrupt-controller {
1763 compatible = "google,gs101-wakeup-eint",
1764 "samsung,exynos850-wakeup-eint",
1765 "samsung,exynos7-wakeup-eint";
1770 compatible = "google,gs101-mbox";
1773 clock-names = "pclk";
1775 #mbox-cells = <0>;
1779 compatible = "google,gs101-pinctrl";
1783 clock-names = "pclk";
1787 compatible = "google,gs101-pinctrl";
1791 clock-names = "pclk";
1795 cmu_top: clock-controller@1e080000 {
1796 compatible = "google,gs101-cmu-top";
1798 #clock-cells = <1>;
1801 clock-names = "oscclk";
1806 compatible = "mmio-sram";
1808 #address-cells = <1>;
1809 #size-cells = <1>;
1814 compatible = "arm,armv8-timer";
1819 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>;
1823 #include "gs101-pinctrl.dtsi"