Lines Matching +full:0 +full:x10c20000
34 #size-cells = <0>;
71 cpu0: cpu@0 {
74 reg = <0x0000>;
84 reg = <0x0100>;
94 reg = <0x0200>;
104 reg = <0x0300>;
114 reg = <0x0400>;
124 reg = <0x0500>;
134 reg = <0x0600>;
144 reg = <0x0700>;
157 arm,psci-suspend-param = <0x0010000>;
166 arm,psci-suspend-param = <0x0010000>;
175 arm,psci-suspend-param = <0x0010000>;
189 #clock-cells = <0>;
195 #clock-cells = <0>;
199 pmu-0 {
218 interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH 0>;
232 reg = <0x0 0x90200000 0x400000>;
237 reg = <0x0 0x93000000 0x1000000>;
242 reg = <0x0 0x94000000 0x03000000>;
247 reg = <0x0 0xf8800000 0x02000000>;
252 reg = <0x0 0xfd3f0000 0x0000e000>;
257 reg = <0x0 0xfd3fe000 0x00001000>;
262 reg = <0x0 0xfd800000 0x00100000>;
267 reg = <0x0 0xfd900000 0x00002000>;
272 soc: soc@0 {
276 ranges = <0x0 0x0 0x0 0x40000000>;
280 reg = <0x10010000 0x8000>;
290 reg = <0x10050000 0x800>;
293 interrupts = <GIC_SPI 753 IRQ_TYPE_LEVEL_HIGH 0>,
294 <GIC_SPI 754 IRQ_TYPE_LEVEL_HIGH 0>,
295 <GIC_SPI 755 IRQ_TYPE_LEVEL_HIGH 0>,
296 <GIC_SPI 756 IRQ_TYPE_LEVEL_HIGH 0>,
297 <GIC_SPI 757 IRQ_TYPE_LEVEL_HIGH 0>,
298 <GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH 0>,
299 <GIC_SPI 759 IRQ_TYPE_LEVEL_HIGH 0>,
300 <GIC_SPI 760 IRQ_TYPE_LEVEL_HIGH 0>,
301 <GIC_SPI 761 IRQ_TYPE_LEVEL_HIGH 0>,
302 <GIC_SPI 762 IRQ_TYPE_LEVEL_HIGH 0>,
303 <GIC_SPI 763 IRQ_TYPE_LEVEL_HIGH 0>,
304 <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH 0>;
309 reg = <0x10060000 0x100>;
313 interrupts = <GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH 0>;
315 samsung,cluster-index = <0>;
321 reg = <0x10070000 0x100>;
325 interrupts = <GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH 0>;
335 reg = <0x10400000 0x10000>, /* GICD */
336 <0x10440000 0x100000>;/* GICR * 8 */
337 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
340 ppi_cluster0: interrupt-partition-0 {
356 reg = <0x10800000 0x4000>;
366 reg = <0x10820000 0x10000>;
372 reg = <0x10840000 0x00001000>;
375 interrupts = <GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH 0>;
380 reg = <0x109000c0 0x20>;
387 samsung,sysreg = <&sysreg_peric0 0x1000>;
393 reg = <0x10900000 0xc0>;
395 #size-cells = <0>;
399 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
400 pinctrl-0 = <&hsi2c1_bus>;
407 reg = <0x10900000 0xc0>;
411 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
412 pinctrl-0 = <&uart1_bus_single>;
420 reg = <0x10900000 0x30>;
422 #size-cells = <0>;
426 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
427 pinctrl-0 = <&spi1_bus>;
435 reg = <0x109100c0 0x20>;
442 samsung,sysreg = <&sysreg_peric0 0x1004>;
448 reg = <0x10910000 0xc0>;
450 #size-cells = <0>;
454 interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
455 pinctrl-0 = <&hsi2c2_bus>;
462 reg = <0x10910000 0xc0>;
466 interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
467 pinctrl-0 = <&uart2_bus_single>;
475 reg = <0x10910000 0x30>;
477 #size-cells = <0>;
481 interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
482 pinctrl-0 = <&spi2_bus>;
490 reg = <0x109200c0 0x20>;
497 samsung,sysreg = <&sysreg_peric0 0x1008>;
503 reg = <0x10920000 0xc0>;
505 #size-cells = <0>;
509 interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
510 pinctrl-0 = <&hsi2c3_bus>;
517 reg = <0x10920000 0xc0>;
521 interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
522 pinctrl-0 = <&uart3_bus_single>;
530 reg = <0x10920000 0x30>;
532 #size-cells = <0>;
536 interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>;
537 pinctrl-0 = <&spi3_bus>;
545 reg = <0x109300c0 0x20>;
552 samsung,sysreg = <&sysreg_peric0 0x100c>;
558 reg = <0x10930000 0xc0>;
560 #size-cells = <0>;
564 interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
565 pinctrl-0 = <&hsi2c4_bus>;
572 reg = <0x10930000 0xc0>;
576 interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
577 pinctrl-0 = <&uart4_bus_single>;
585 reg = <0x10930000 0x30>;
587 #size-cells = <0>;
591 interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
592 pinctrl-0 = <&spi4_bus>;
600 reg = <0x109400c0 0x20>;
607 samsung,sysreg = <&sysreg_peric0 0x1010>;
613 reg = <0x10940000 0xc0>;
615 #size-cells = <0>;
619 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
620 pinctrl-0 = <&hsi2c5_bus>;
627 reg = <0x10940000 0xc0>;
631 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
632 pinctrl-0 = <&uart5_bus_single>;
640 reg = <0x10940000 0x30>;
642 #size-cells = <0>;
646 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
647 pinctrl-0 = <&spi5_bus>;
655 reg = <0x109500c0 0x20>;
662 samsung,sysreg = <&sysreg_peric0 0x1014>;
668 reg = <0x10950000 0xc0>;
670 #size-cells = <0>;
674 interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
675 pinctrl-0 = <&hsi2c6_bus>;
682 reg = <0x10950000 0xc0>;
686 interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
687 pinctrl-0 = <&uart6_bus_single>;
695 reg = <0x10950000 0x30>;
697 #size-cells = <0>;
701 interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
702 pinctrl-0 = <&spi6_bus>;
710 reg = <0x109600c0 0x20>;
717 samsung,sysreg = <&sysreg_peric0 0x1018>;
723 reg = <0x10960000 0xc0>;
725 #size-cells = <0>;
729 interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
730 pinctrl-0 = <&hsi2c7_bus>;
737 reg = <0x10960000 0xc0>;
741 interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
742 pinctrl-0 = <&uart7_bus_single>;
750 reg = <0x10960000 0x30>;
752 #size-cells = <0>;
756 interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
757 pinctrl-0 = <&spi7_bus>;
765 reg = <0x109700c0 0x20>;
772 samsung,sysreg = <&sysreg_peric0 0x101c>;
778 reg = <0x10970000 0xc0>;
780 #size-cells = <0>;
784 interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
785 pinctrl-0 = <&hsi2c8_bus>;
792 reg = <0x10970000 0xc0>;
796 interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
797 pinctrl-0 = <&uart8_bus_single>;
805 reg = <0x10970000 0x30>;
807 #size-cells = <0>;
811 interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
812 pinctrl-0 = <&spi8_bus>;
820 reg = <0x10a000c0 0x20>;
827 samsung,sysreg = <&sysreg_peric0 0x1020>;
833 reg = <0x10a00000 0xc0>;
837 interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>;
838 pinctrl-0 = <&uart0_bus>;
847 reg = <0x10a200c0 0x20>;
854 samsung,sysreg = <&sysreg_peric0 0x1028>;
860 reg = <0x10a20000 0xc0>;
862 #size-cells = <0>;
866 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
867 pinctrl-0 = <&hsi2c14_bus>;
874 reg = <0x10a20000 0xc0>;
878 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
879 pinctrl-0 = <&uart14_bus_single>;
887 reg = <0x10a20000 0x30>;
889 #size-cells = <0>;
893 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
894 pinctrl-0 = <&spi14_bus>;
902 reg = <0x10c00000 0x4000>;
912 reg = <0x10c20000 0x10000>;
918 reg = <0x10c40000 0x00001000>;
921 interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>;
926 reg = <0x10d100c0 0x20>;
933 samsung,sysreg = <&sysreg_peric1 0x1000>;
939 reg = <0x10d10000 0xc0>;
941 #size-cells = <0>;
945 interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
946 pinctrl-0 = <&hsi2c0_bus>;
953 reg = <0x10d10000 0xc0>;
957 interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
958 pinctrl-0 = <&uart0_bus_single>;
966 reg = <0x10d10000 0x30>;
968 #size-cells = <0>;
972 interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>;
973 pinctrl-0 = <&spi0_bus>;
981 reg = <0x10d200c0 0x20>;
988 samsung,sysreg = <&sysreg_peric1 0x1004>;
994 reg = <0x10d20000 0xc0>;
996 #size-cells = <0>;
1000 interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
1001 pinctrl-0 = <&hsi2c9_bus>;
1008 reg = <0x10d20000 0xc0>;
1012 interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
1013 pinctrl-0 = <&uart9_bus_single>;
1021 reg = <0x10d20000 0x30>;
1023 #size-cells = <0>;
1027 interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>;
1028 pinctrl-0 = <&spi9_bus>;
1036 reg = <0x10d300c0 0x20>;
1043 samsung,sysreg = <&sysreg_peric1 0x1008>;
1049 reg = <0x10d30000 0xc0>;
1051 #size-cells = <0>;
1055 interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
1056 pinctrl-0 = <&hsi2c10_bus>;
1063 reg = <0x10d30000 0xc0>;
1067 interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
1068 pinctrl-0 = <&uart10_bus_single>;
1076 reg = <0x10d30000 0x30>;
1078 #size-cells = <0>;
1082 interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>;
1083 pinctrl-0 = <&spi10_bus>;
1091 reg = <0x10d400c0 0x20>;
1098 samsung,sysreg = <&sysreg_peric1 0x100c>;
1104 reg = <0x10d40000 0xc0>;
1106 #size-cells = <0>;
1110 interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
1111 pinctrl-0 = <&hsi2c11_bus>;
1118 reg = <0x10d40000 0xc0>;
1122 interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
1123 pinctrl-0 = <&uart11_bus_single>;
1131 reg = <0x10d40000 0x30>;
1133 #size-cells = <0>;
1137 interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>;
1138 pinctrl-0 = <&spi11_bus>;
1146 reg = <0x10d500c0 0x20>;
1153 samsung,sysreg = <&sysreg_peric1 0x1010>;
1159 reg = <0x10d50000 0xc0>;
1161 #size-cells = <0>;
1165 interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
1166 pinctrl-0 = <&hsi2c12_bus>;
1173 reg = <0x10d50000 0xc0>;
1177 interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
1178 pinctrl-0 = <&uart12_bus_single>;
1186 reg = <0x10d50000 0x30>;
1188 #size-cells = <0>;
1192 interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
1193 pinctrl-0 = <&spi12_bus>;
1201 reg = <0x10d600c0 0x20>;
1208 samsung,sysreg = <&sysreg_peric1 0x1014>;
1214 reg = <0x10d60000 0xc0>;
1216 #size-cells = <0>;
1220 interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
1221 pinctrl-0 = <&hsi2c13_bus>;
1228 reg = <0x10d60000 0xc0>;
1232 interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
1233 pinctrl-0 = <&uart13_bus_single>;
1241 reg = <0x10d60000 0x30>;
1243 #size-cells = <0>;
1247 interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
1248 pinctrl-0 = <&spi13_bus>;
1256 reg = <0x11000000 0x4000>;
1270 reg = <0x11100000 0x0100>,
1271 <0x110f0000 0x0800>,
1272 <0x110e0000 0x2800>;
1287 ranges = <0x0 0x11110000 0x10000>;
1297 usbdrd31_dwc3: usb@0 {
1299 reg = <0x0 0x10000>;
1302 interrupts = <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH 0>;
1303 phys = <&usbdrd31_phy 0>, <&usbdrd31_phy 1>;
1311 reg = <0x11840000 0x00001000>;
1313 clocks = <0>;
1315 interrupts = <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH 0>;
1320 reg = <0x14400000 0x4000>;
1332 reg = <0x14420000 0x10000>;
1338 reg = <0x14440000 0x00001000>;
1341 interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>;
1346 reg = <0x14700000 0x200>,
1347 <0x14701100 0x200>,
1348 <0x14780000 0xa000>,
1349 <0x14600000 0x100>;
1351 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH 0>;
1360 freq-table-hz = <0 0>, <0 0>, <0 0>, <0 0>, <0 0>, <0 0>;
1361 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
1365 samsung,sysreg = <&sysreg_hsi2 0x710>;
1371 reg = <0x14704000 0x3000>;
1374 #phy-cells = <0>;
1382 reg = <0x17400000 0x8000>;
1391 reg = <0x174204e0 0x1000>;
1396 reg = <0x17460000 0x10000>;
1401 offset = <0x3e9c>; /* PAD_CTRL_PWR_HOLD */
1402 mask = <0x100>; /* reset value */
1408 offset = <0x3a00>; /* SYSTEM_CONFIGURATION */
1409 mask = <0x2>; /* SWRESET_SYSTEM */
1410 value = <0x2>; /* reset value */
1416 reg = <0x174d0000 0x00001000>;
1429 reg = <0x174e0000 0x00001000>;
1442 reg = <0x17940000 0x00001000>;
1444 clocks = <0>;
1450 reg = <0x17a80000 0x00001000>;
1452 clocks = <0>;
1458 reg = <0x1e080000 0x8000>;
1469 <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>,
1470 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>,
1471 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>,
1472 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>;