Lines Matching +full:psci +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/samsung,exynosautov920.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/samsung,exynos-usi.h>
15 #address-cells = <2>;
16 #size-cells = <1>;
18 interrupt-parent = <&gic>;
31 arm-pmu {
32 compatible = "arm,cortex-a78-pmu";
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
39 clock-output-names = "oscclk";
43 #address-cells = <2>;
44 #size-cells = <0>;
46 cpu-map {
89 compatible = "arm,cortex-a78ae";
91 enable-method = "psci";
96 compatible = "arm,cortex-a78ae";
98 enable-method = "psci";
103 compatible = "arm,cortex-a78ae";
105 enable-method = "psci";
110 compatible = "arm,cortex-a78ae";
112 enable-method = "psci";
117 compatible = "arm,cortex-a78ae";
119 enable-method = "psci";
124 compatible = "arm,cortex-a78ae";
126 enable-method = "psci";
131 compatible = "arm,cortex-a78ae";
133 enable-method = "psci";
138 compatible = "arm,cortex-a78ae";
140 enable-method = "psci";
145 compatible = "arm,cortex-a78ae";
147 enable-method = "psci";
152 compatible = "arm,cortex-a78ae";
154 enable-method = "psci";
158 psci {
159 compatible = "arm,psci-1.0";
164 compatible = "simple-bus";
165 #address-cells = <1>;
166 #size-cells = <1>;
170 compatible = "samsung,exynosautov920-chipid",
171 "samsung,exynos850-chipid";
175 cmu_misc: clock-controller@10020000 {
176 compatible = "samsung,exynosautov920-cmu-misc";
178 #clock-cells = <1>;
182 clock-names = "oscclk",
186 gic: interrupt-controller@10400000 {
187 compatible = "arm,gic-v3";
188 #interrupt-cells = <3>;
189 #address-cells = <0>;
190 interrupt-controller;
196 cmu_peric0: clock-controller@10800000 {
197 compatible = "samsung,exynosautov920-cmu-peric0";
199 #clock-cells = <1>;
204 clock-names = "oscclk",
210 compatible = "samsung,exynosautov920-peric0-sysreg",
216 compatible = "samsung,exynosautov920-pinctrl";
222 compatible = "samsung,exynosautov920-usi",
223 "samsung,exynos850-usi";
227 #address-cells = <1>;
228 #size-cells = <1>;
232 clock-names = "pclk", "ipclk";
236 compatible = "samsung,exynosautov920-uart",
237 "samsung,exynos850-uart";
240 pinctrl-names = "default";
241 pinctrl-0 = <&uart0_bus>;
244 clock-names = "uart", "clk_uart_baud0";
245 samsung,uart-fifosize = <256>;
251 compatible = "samsung,exynosautov920-pwm",
252 "samsung,exynos4210-pwm";
254 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
255 #pwm-cells = <3>;
257 clock-names = "timers";
261 cmu_peric1: clock-controller@10c00000 {
262 compatible = "samsung,exynosautov920-cmu-peric1";
264 #clock-cells = <1>;
269 clock-names = "oscclk",
275 compatible = "samsung,exynosautov920-peric1-sysreg",
281 compatible = "samsung,exynosautov920-pinctrl";
286 cmu_top: clock-controller@11000000 {
287 compatible = "samsung,exynosautov920-cmu-top";
289 #clock-cells = <1>;
292 clock-names = "oscclk";
296 compatible = "samsung,exynosautov920-pinctrl";
299 wakeup-interrupt-controller {
300 compatible = "samsung,exynosautov920-wakeup-eint";
304 pmu_system_controller: system-controller@11860000 {
305 compatible = "samsung,exynosautov920-pmu",
306 "samsung,exynos7-pmu","syscon";
310 cmu_hsi0: clock-controller@16000000 {
311 compatible = "samsung,exynosautov920-cmu-hsi0";
313 #clock-cells = <1>;
317 clock-names = "oscclk",
322 compatible = "samsung,exynosautov920-pinctrl";
327 cmu_hsi1: clock-controller@16400000 {
328 compatible = "samsung,exynosautov920-cmu-hsi1";
330 #clock-cells = <1>;
336 clock-names = "oscclk",
343 compatible = "samsung,exynosautov920-pinctrl";
349 compatible = "samsung,exynosautov920-pinctrl";
355 compatible = "samsung,exynosautov920-pinctrl";
360 pinctrl_aud: pinctrl@1a460000 {
361 compatible = "samsung,exynosautov920-pinctrl";
367 compatible = "arm,armv8-timer";
376 #include "exynosautov920-pinctrl.dtsi"