Lines Matching +full:psci +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/samsung,exynosautov920.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/samsung,exynos-usi.h>
15 #address-cells = <2>;
16 #size-cells = <1>;
18 interrupt-parent = <&gic>;
31 arm-pmu {
32 compatible = "arm,cortex-a78-pmu";
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
39 clock-output-names = "oscclk";
43 #address-cells = <2>;
44 #size-cells = <0>;
46 cpu-map {
87 cpu0: cpu@0 {
89 compatible = "arm,cortex-a78ae";
90 reg = <0x0 0x0>;
91 enable-method = "psci";
96 compatible = "arm,cortex-a78ae";
97 reg = <0x0 0x100>;
98 enable-method = "psci";
103 compatible = "arm,cortex-a78ae";
104 reg = <0x0 0x200>;
105 enable-method = "psci";
110 compatible = "arm,cortex-a78ae";
111 reg = <0x0 0x300>;
112 enable-method = "psci";
117 compatible = "arm,cortex-a78ae";
118 reg = <0x0 0x10000>;
119 enable-method = "psci";
124 compatible = "arm,cortex-a78ae";
125 reg = <0x0 0x10100>;
126 enable-method = "psci";
131 compatible = "arm,cortex-a78ae";
132 reg = <0x0 0x10200>;
133 enable-method = "psci";
138 compatible = "arm,cortex-a78ae";
139 reg = <0x0 0x10300>;
140 enable-method = "psci";
145 compatible = "arm,cortex-a78ae";
146 reg = <0x0 0x20000>;
147 enable-method = "psci";
152 compatible = "arm,cortex-a78ae";
153 reg = <0x0 0x20100>;
154 enable-method = "psci";
158 psci {
159 compatible = "arm,psci-1.0";
163 soc: soc@0 {
164 compatible = "simple-bus";
165 #address-cells = <1>;
166 #size-cells = <1>;
167 ranges = <0x0 0x0 0x0 0x20000000>;
170 compatible = "samsung,exynosautov920-chipid",
171 "samsung,exynos850-chipid";
172 reg = <0x10000000 0x24>;
175 cmu_misc: clock-controller@10020000 {
176 compatible = "samsung,exynosautov920-cmu-misc";
177 reg = <0x10020000 0x8000>;
178 #clock-cells = <1>;
182 clock-names = "oscclk",
186 gic: interrupt-controller@10400000 {
187 compatible = "arm,gic-v3";
188 #interrupt-cells = <3>;
189 #address-cells = <0>;
190 interrupt-controller;
191 reg = <0x10400000 0x10000>,
192 <0x10460000 0x140000>;
196 cmu_peric0: clock-controller@10800000 {
197 compatible = "samsung,exynosautov920-cmu-peric0";
198 reg = <0x10800000 0x8000>;
199 #clock-cells = <1>;
204 clock-names = "oscclk",
210 compatible = "samsung,exynosautov920-peric0-sysreg",
212 reg = <0x10820000 0x2000>;
216 compatible = "samsung,exynosautov920-pinctrl";
217 reg = <0x10830000 0x10000>;
222 compatible = "samsung,exynosautov920-usi",
223 "samsung,exynos850-usi";
224 reg = <0x108800c0 0x20>;
225 samsung,sysreg = <&syscon_peric0 0x1000>;
227 #address-cells = <1>;
228 #size-cells = <1>;
232 clock-names = "pclk", "ipclk";
236 compatible = "samsung,exynosautov920-uart",
237 "samsung,exynos850-uart";
238 reg = <0x10880000 0xc0>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&uart0_bus>;
244 clock-names = "uart", "clk_uart_baud0";
245 samsung,uart-fifosize = <256>;
251 compatible = "samsung,exynosautov920-pwm",
252 "samsung,exynos4210-pwm";
253 reg = <0x109b0000 0x100>;
254 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
255 #pwm-cells = <3>;
257 clock-names = "timers";
261 cmu_peric1: clock-controller@10c00000 {
262 compatible = "samsung,exynosautov920-cmu-peric1";
263 reg = <0x10c00000 0x8000>;
264 #clock-cells = <1>;
269 clock-names = "oscclk",
275 compatible = "samsung,exynosautov920-peric1-sysreg",
277 reg = <0x10c20000 0x2000>;
281 compatible = "samsung,exynosautov920-pinctrl";
282 reg = <0x10c30000 0x10000>;
286 cmu_top: clock-controller@11000000 {
287 compatible = "samsung,exynosautov920-cmu-top";
288 reg = <0x11000000 0x8000>;
289 #clock-cells = <1>;
292 clock-names = "oscclk";
296 compatible = "samsung,exynosautov920-pinctrl";
297 reg = <0x11850000 0x10000>;
299 wakeup-interrupt-controller {
300 compatible = "samsung,exynosautov920-wakeup-eint";
304 pmu_system_controller: system-controller@11860000 {
305 compatible = "samsung,exynosautov920-pmu",
306 "samsung,exynos7-pmu","syscon";
307 reg = <0x11860000 0x10000>;
310 cmu_hsi0: clock-controller@16000000 {
311 compatible = "samsung,exynosautov920-cmu-hsi0";
312 reg = <0x16000000 0x8000>;
313 #clock-cells = <1>;
317 clock-names = "oscclk",
322 compatible = "samsung,exynosautov920-pinctrl";
323 reg = <0x16040000 0x10000>;
327 cmu_hsi1: clock-controller@16400000 {
328 compatible = "samsung,exynosautov920-cmu-hsi1";
329 reg = <0x16400000 0x8000>;
330 #clock-cells = <1>;
336 clock-names = "oscclk",
343 compatible = "samsung,exynosautov920-pinctrl";
344 reg = <0x16450000 0x10000>;
349 compatible = "samsung,exynosautov920-pinctrl";
350 reg = <0x16c10000 0x10000>;
355 compatible = "samsung,exynosautov920-pinctrl";
356 reg = <0x16d20000 0x10000>;
361 compatible = "samsung,exynosautov920-pinctrl";
362 reg = <0x1a460000 0x10000>;
367 compatible = "arm,armv8-timer";
376 #include "exynosautov920-pinctrl.dtsi"