Lines Matching +full:0 +full:x10050000
52 #clock-cells = <0>;
57 #size-cells = <0>;
91 cpu0: cpu@0 {
94 reg = <0x0>;
102 reg = <0x1>;
108 reg = <0x2>;
114 reg = <0x3>;
120 reg = <0x100>;
128 reg = <0x101>;
134 reg = <0x102>;
140 reg = <0x103>;
160 soc: soc@0 {
164 ranges = <0x0 0x0 0x0 0x20000000>;
168 reg = <0x10000000 0x100>;
174 reg = <0x10040000 0x800>;
193 reg = <0x120c0000 0x1000>;
204 #address-cells = <0>;
205 reg = <0x12a01000 0x1000>,
206 <0x12a02000 0x2000>,
207 <0x12a04000 0x2000>,
208 <0x12a06000 0x2000>;
216 reg = <0x11860000 0x10000>;
221 offset = <0x3a00>; /* SYSTEM_CONFIGURATION */
222 mask = <0x2>; /* SWRESET_SYSTEM */
223 value = <0x2>; /* reset value */
229 reg = <0x10050000 0x100>;
234 samsung,cluster-index = <0>;
240 reg = <0x10060000 0x100>;
251 reg = <0x10030000 0x8000>;
263 reg = <0x10800000 0x8000>;
274 reg = <0x10900000 0x8000>;
285 reg = <0x11400000 0x8000>;
294 reg = <0x11800000 0x8000>;
303 reg = <0x11c00000 0x8000>;
312 reg = <0x12000000 0x8000>;
326 reg = <0x120e0000 0x8000>;
335 reg = <0x12c00000 0x8000>;
350 reg = <0x13000000 0x8000>;
359 reg = <0x13400000 0x8000>;
372 reg = <0x14500000 0x8000>;
386 reg = <0x14a00000 0x8000>;
395 reg = <0x11850000 0x1000>;
405 reg = <0x11c30000 0x1000>;
415 reg = <0x12070000 0x1000>;
421 reg = <0x12081400 0x100>;
429 reg = <0x13430000 0x1000>;
435 reg = <0x139b0000 0x1000>;
441 reg = <0x14a60000 0x1000>;
446 reg = <0x11a30000 0x100>;
457 reg = <0x12100000 0x2000>;
460 #size-cells = <0>;
464 fifo-depth = <0x40>;
470 reg = <0x13830000 0x100>;
473 #size-cells = <0>;
475 pinctrl-0 = <&i2c0_pins>;
483 reg = <0x13840000 0x100>;
486 #size-cells = <0>;
488 pinctrl-0 = <&i2c1_pins>;
496 reg = <0x13850000 0x100>;
499 #size-cells = <0>;
501 pinctrl-0 = <&i2c2_pins>;
509 reg = <0x13860000 0x100>;
512 #size-cells = <0>;
514 pinctrl-0 = <&i2c3_pins>;
522 reg = <0x13870000 0x100>;
525 #size-cells = <0>;
527 pinctrl-0 = <&i2c4_pins>;
536 reg = <0x13880000 0x100>;
539 #size-cells = <0>;
541 pinctrl-0 = <&i2c5_pins>;
550 reg = <0x13890000 0x100>;
553 #size-cells = <0>;
555 pinctrl-0 = <&i2c6_pins>;
563 reg = <0x12c50000 0x9000>;
567 #iommu-cells = <0>;
572 reg = <0x130c0000 0x9000>;
576 #iommu-cells = <0>;
581 reg = <0x14550000 0x9000>;
585 #iommu-cells = <0>;
590 reg = <0x14570000 0x9000>;
594 #iommu-cells = <0>;
599 reg = <0x14850000 0x9000>;
603 #iommu-cells = <0>;
609 reg = <0x10020000 0x10000>;
616 reg = <0x11c20000 0x10000>;
622 ranges = <0x0 0x13600000 0x10000>;
630 usbdrd_dwc3: usb@0 {
632 reg = <0x0 0x10000>;
634 phys = <&usbdrd_phy 0>;
641 reg = <0x135d0000 0x100>;
652 reg = <0x138200c0 0x20>;
653 samsung,sysreg = <&sysreg_peri 0x1010>;
665 reg = <0x13820000 0xc0>;
668 pinctrl-0 = <&uart0_pins>;
678 reg = <0x138a00c0 0x20>;
679 samsung,sysreg = <&sysreg_peri 0x1020>;
692 reg = <0x138a0000 0xc0>;
695 #size-cells = <0>;
697 pinctrl-0 = <&hsi2c0_pins>;
707 reg = <0x138b00c0 0x20>;
708 samsung,sysreg = <&sysreg_peri 0x1030>;
721 reg = <0x138b0000 0xc0>;
724 #size-cells = <0>;
726 pinctrl-0 = <&hsi2c1_pins>;
736 reg = <0x138c00c0 0x20>;
737 samsung,sysreg = <&sysreg_peri 0x1040>;
750 reg = <0x138c0000 0xc0>;
753 #size-cells = <0>;
755 pinctrl-0 = <&hsi2c2_pins>;
765 reg = <0x139400c0 0x20>;
766 samsung,sysreg = <&sysreg_peri 0x1050>;
778 reg = <0x13940000 0x30>;
785 pinctrl-0 = <&spi0_pins>;
788 samsung,spi-src-clk = <0>;
790 #size-cells = <0>;
797 reg = <0x11d000c0 0x20>;
798 samsung,sysreg = <&sysreg_cmgp 0x2000>;
811 reg = <0x11d00000 0xc0>;
814 #size-cells = <0>;
816 pinctrl-0 = <&hsi2c3_pins>;
825 reg = <0x11d00000 0xc0>;
828 pinctrl-0 = <&uart1_single_pins>;
837 reg = <0x11d00000 0x30>;
844 pinctrl-0 = <&spi1_pins>;
847 samsung,spi-src-clk = <0>;
849 #size-cells = <0>;
856 reg = <0x11d200c0 0x20>;
857 samsung,sysreg = <&sysreg_cmgp 0x2010>;
870 reg = <0x11d20000 0xc0>;
873 #size-cells = <0>;
875 pinctrl-0 = <&hsi2c4_pins>;
884 reg = <0x11d20000 0xc0>;
887 pinctrl-0 = <&uart2_single_pins>;
896 reg = <0x11d20000 0x30>;
903 pinctrl-0 = <&spi2_pins>;
906 samsung,spi-src-clk = <0>;
908 #size-cells = <0>;