Lines Matching +full:exynos5433 +full:- +full:i2s
1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos5433 SoC device tree source
7 * Samsung's Exynos5433 SoC device nodes are listed in this file.
8 * Exynos5433 based board files can include this file and provide
12 * Exynos5433 SoC. As device tree coverage for Exynos5433 increases,
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 compatible = "samsung,exynos5433";
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
35 arm-a57-pmu {
36 compatible = "arm,cortex-a57-pmu";
41 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
46 compatible = "fixed-clock";
47 clock-output-names = "oscclk";
48 #clock-cells = <0>;
52 #address-cells = <1>;
53 #size-cells = <0>;
55 cpu-map {
89 compatible = "arm,cortex-a53";
90 enable-method = "psci";
93 clock-names = "apolloclk";
94 operating-points-v2 = <&cluster_a53_opp_table>;
95 #cooling-cells = <2>;
96 i-cache-size = <0x8000>;
97 i-cache-line-size = <64>;
98 i-cache-sets = <256>;
99 d-cache-size = <0x8000>;
100 d-cache-line-size = <64>;
101 d-cache-sets = <128>;
102 next-level-cache = <&cluster_a53_l2>;
107 compatible = "arm,cortex-a53";
108 enable-method = "psci";
110 operating-points-v2 = <&cluster_a53_opp_table>;
111 #cooling-cells = <2>;
112 i-cache-size = <0x8000>;
113 i-cache-line-size = <64>;
114 i-cache-sets = <256>;
115 d-cache-size = <0x8000>;
116 d-cache-line-size = <64>;
117 d-cache-sets = <128>;
118 next-level-cache = <&cluster_a53_l2>;
123 compatible = "arm,cortex-a53";
124 enable-method = "psci";
126 operating-points-v2 = <&cluster_a53_opp_table>;
127 #cooling-cells = <2>;
128 i-cache-size = <0x8000>;
129 i-cache-line-size = <64>;
130 i-cache-sets = <256>;
131 d-cache-size = <0x8000>;
132 d-cache-line-size = <64>;
133 d-cache-sets = <128>;
134 next-level-cache = <&cluster_a53_l2>;
139 compatible = "arm,cortex-a53";
140 enable-method = "psci";
142 operating-points-v2 = <&cluster_a53_opp_table>;
143 #cooling-cells = <2>;
144 i-cache-size = <0x8000>;
145 i-cache-line-size = <64>;
146 i-cache-sets = <256>;
147 d-cache-size = <0x8000>;
148 d-cache-line-size = <64>;
149 d-cache-sets = <128>;
150 next-level-cache = <&cluster_a53_l2>;
155 compatible = "arm,cortex-a57";
156 enable-method = "psci";
159 clock-names = "atlasclk";
160 operating-points-v2 = <&cluster_a57_opp_table>;
161 #cooling-cells = <2>;
162 i-cache-size = <0xc000>;
163 i-cache-line-size = <64>;
164 i-cache-sets = <256>;
165 d-cache-size = <0x8000>;
166 d-cache-line-size = <64>;
167 d-cache-sets = <256>;
168 next-level-cache = <&cluster_a57_l2>;
173 compatible = "arm,cortex-a57";
174 enable-method = "psci";
176 operating-points-v2 = <&cluster_a57_opp_table>;
177 #cooling-cells = <2>;
178 i-cache-size = <0xc000>;
179 i-cache-line-size = <64>;
180 i-cache-sets = <256>;
181 d-cache-size = <0x8000>;
182 d-cache-line-size = <64>;
183 d-cache-sets = <256>;
184 next-level-cache = <&cluster_a57_l2>;
189 compatible = "arm,cortex-a57";
190 enable-method = "psci";
192 operating-points-v2 = <&cluster_a57_opp_table>;
193 #cooling-cells = <2>;
194 i-cache-size = <0xc000>;
195 i-cache-line-size = <64>;
196 i-cache-sets = <256>;
197 d-cache-size = <0x8000>;
198 d-cache-line-size = <64>;
199 d-cache-sets = <256>;
200 next-level-cache = <&cluster_a57_l2>;
205 compatible = "arm,cortex-a57";
206 enable-method = "psci";
208 operating-points-v2 = <&cluster_a57_opp_table>;
209 #cooling-cells = <2>;
210 i-cache-size = <0xc000>;
211 i-cache-line-size = <64>;
212 i-cache-sets = <256>;
213 d-cache-size = <0x8000>;
214 d-cache-line-size = <64>;
215 d-cache-sets = <256>;
216 next-level-cache = <&cluster_a57_l2>;
219 cluster_a57_l2: l2-cache0 {
221 cache-level = <2>;
222 cache-unified;
223 cache-size = <0x200000>;
224 cache-line-size = <64>;
225 cache-sets = <2048>;
228 cluster_a53_l2: l2-cache1 {
230 cache-level = <2>;
231 cache-unified;
232 cache-size = <0x40000>;
233 cache-line-size = <64>;
234 cache-sets = <256>;
238 cluster_a53_opp_table: opp-table-0 {
239 compatible = "operating-points-v2";
240 opp-shared;
242 opp-400000000 {
243 opp-hz = /bits/ 64 <400000000>;
244 opp-microvolt = <900000>;
246 opp-500000000 {
247 opp-hz = /bits/ 64 <500000000>;
248 opp-microvolt = <925000>;
250 opp-600000000 {
251 opp-hz = /bits/ 64 <600000000>;
252 opp-microvolt = <950000>;
254 opp-700000000 {
255 opp-hz = /bits/ 64 <700000000>;
256 opp-microvolt = <975000>;
258 opp-800000000 {
259 opp-hz = /bits/ 64 <800000000>;
260 opp-microvolt = <1000000>;
262 opp-900000000 {
263 opp-hz = /bits/ 64 <900000000>;
264 opp-microvolt = <1050000>;
266 opp-1000000000 {
267 opp-hz = /bits/ 64 <1000000000>;
268 opp-microvolt = <1075000>;
270 opp-1100000000 {
271 opp-hz = /bits/ 64 <1100000000>;
272 opp-microvolt = <1112500>;
274 opp-1200000000 {
275 opp-hz = /bits/ 64 <1200000000>;
276 opp-microvolt = <1112500>;
278 opp-1300000000 {
279 opp-hz = /bits/ 64 <1300000000>;
280 opp-microvolt = <1150000>;
284 cluster_a57_opp_table: opp-table-1 {
285 compatible = "operating-points-v2";
286 opp-shared;
288 opp-500000000 {
289 opp-hz = /bits/ 64 <500000000>;
290 opp-microvolt = <900000>;
292 opp-600000000 {
293 opp-hz = /bits/ 64 <600000000>;
294 opp-microvolt = <900000>;
296 opp-700000000 {
297 opp-hz = /bits/ 64 <700000000>;
298 opp-microvolt = <912500>;
300 opp-800000000 {
301 opp-hz = /bits/ 64 <800000000>;
302 opp-microvolt = <912500>;
304 opp-900000000 {
305 opp-hz = /bits/ 64 <900000000>;
306 opp-microvolt = <937500>;
308 opp-1000000000 {
309 opp-hz = /bits/ 64 <1000000000>;
310 opp-microvolt = <975000>;
312 opp-1100000000 {
313 opp-hz = /bits/ 64 <1100000000>;
314 opp-microvolt = <1012500>;
316 opp-1200000000 {
317 opp-hz = /bits/ 64 <1200000000>;
318 opp-microvolt = <1037500>;
320 opp-1300000000 {
321 opp-hz = /bits/ 64 <1300000000>;
322 opp-microvolt = <1062500>;
324 opp-1400000000 {
325 opp-hz = /bits/ 64 <1400000000>;
326 opp-microvolt = <1087500>;
328 opp-1500000000 {
329 opp-hz = /bits/ 64 <1500000000>;
330 opp-microvolt = <1125000>;
332 opp-1600000000 {
333 opp-hz = /bits/ 64 <1600000000>;
334 opp-microvolt = <1137500>;
336 opp-1700000000 {
337 opp-hz = /bits/ 64 <1700000000>;
338 opp-microvolt = <1175000>;
340 opp-1800000000 {
341 opp-hz = /bits/ 64 <1800000000>;
342 opp-microvolt = <1212500>;
344 opp-1900000000 {
345 opp-hz = /bits/ 64 <1900000000>;
346 opp-microvolt = <1262500>;
358 compatible = "simple-bus";
359 #address-cells = <1>;
360 #size-cells = <1>;
364 compatible = "samsung,exynos5433-chipid",
365 "samsung,exynos4210-chipid";
369 cmu_top: clock-controller@10030000 {
370 compatible = "samsung,exynos5433-cmu-top";
372 #clock-cells = <1>;
374 clock-names = "oscclk",
384 cmu_cpif: clock-controller@10fc0000 {
385 compatible = "samsung,exynos5433-cmu-cpif";
387 #clock-cells = <1>;
389 clock-names = "oscclk";
393 cmu_mif: clock-controller@105b0000 {
394 compatible = "samsung,exynos5433-cmu-mif";
396 #clock-cells = <1>;
398 clock-names = "oscclk",
404 cmu_peric: clock-controller@14c80000 {
405 compatible = "samsung,exynos5433-cmu-peric";
407 #clock-cells = <1>;
410 cmu_peris: clock-controller@10040000 {
411 compatible = "samsung,exynos5433-cmu-peris";
413 #clock-cells = <1>;
416 cmu_fsys: clock-controller@156e0000 {
417 compatible = "samsung,exynos5433-cmu-fsys";
419 #clock-cells = <1>;
421 clock-names = "oscclk",
443 cmu_g2d: clock-controller@12460000 {
444 compatible = "samsung,exynos5433-cmu-g2d";
446 #clock-cells = <1>;
448 clock-names = "oscclk",
454 power-domains = <&pd_g2d>;
457 cmu_disp: clock-controller@13b90000 {
458 compatible = "samsung,exynos5433-cmu-disp";
460 #clock-cells = <1>;
462 clock-names = "oscclk",
480 power-domains = <&pd_disp>;
483 cmu_aud: clock-controller@114c0000 {
484 compatible = "samsung,exynos5433-cmu-aud";
486 #clock-cells = <1>;
487 clock-names = "oscclk", "fout_aud_pll";
489 power-domains = <&pd_aud>;
492 cmu_bus0: clock-controller@13600000 {
493 compatible = "samsung,exynos5433-cmu-bus0";
495 #clock-cells = <1>;
497 clock-names = "aclk_bus0_400";
501 cmu_bus1: clock-controller@14800000 {
502 compatible = "samsung,exynos5433-cmu-bus1";
504 #clock-cells = <1>;
506 clock-names = "aclk_bus1_400";
510 cmu_bus2: clock-controller@13400000 {
511 compatible = "samsung,exynos5433-cmu-bus2";
513 #clock-cells = <1>;
515 clock-names = "oscclk", "aclk_bus2_400";
519 cmu_g3d: clock-controller@14aa0000 {
520 compatible = "samsung,exynos5433-cmu-g3d";
522 #clock-cells = <1>;
524 clock-names = "oscclk", "aclk_g3d_400";
526 power-domains = <&pd_g3d>;
529 cmu_gscl: clock-controller@13cf0000 {
530 compatible = "samsung,exynos5433-cmu-gscl";
532 #clock-cells = <1>;
534 clock-names = "oscclk",
540 power-domains = <&pd_gscl>;
543 cmu_apollo: clock-controller@11900000 {
544 compatible = "samsung,exynos5433-cmu-apollo";
546 #clock-cells = <1>;
548 clock-names = "oscclk", "sclk_bus_pll_apollo";
552 cmu_atlas: clock-controller@11800000 {
553 compatible = "samsung,exynos5433-cmu-atlas";
555 #clock-cells = <1>;
557 clock-names = "oscclk", "sclk_bus_pll_atlas";
561 cmu_mscl: clock-controller@150d0000 {
562 compatible = "samsung,exynos5433-cmu-mscl";
564 #clock-cells = <1>;
566 clock-names = "oscclk",
572 power-domains = <&pd_mscl>;
575 cmu_mfc: clock-controller@15280000 {
576 compatible = "samsung,exynos5433-cmu-mfc";
578 #clock-cells = <1>;
580 clock-names = "oscclk", "aclk_mfc_400";
582 power-domains = <&pd_mfc>;
585 cmu_hevc: clock-controller@14f80000 {
586 compatible = "samsung,exynos5433-cmu-hevc";
588 #clock-cells = <1>;
590 clock-names = "oscclk", "aclk_hevc_400";
592 power-domains = <&pd_hevc>;
595 cmu_isp: clock-controller@146d0000 {
596 compatible = "samsung,exynos5433-cmu-isp";
598 #clock-cells = <1>;
600 clock-names = "oscclk",
606 power-domains = <&pd_isp>;
609 cmu_cam0: clock-controller@120d0000 {
610 compatible = "samsung,exynos5433-cmu-cam0";
612 #clock-cells = <1>;
614 clock-names = "oscclk",
622 power-domains = <&pd_cam0>;
625 cmu_cam1: clock-controller@145d0000 {
626 compatible = "samsung,exynos5433-cmu-cam1";
628 #clock-cells = <1>;
630 clock-names = "oscclk",
644 power-domains = <&pd_cam1>;
647 cmu_imem: clock-controller@11060000 {
648 compatible = "samsung,exynos5433-cmu-imem";
650 #clock-cells = <1>;
652 clock-names = "oscclk",
662 slim_sss: slim-sss@11140000 {
663 compatible = "samsung,exynos5433-slim-sss";
666 clock-names = "pclk", "aclk";
671 pd_gscl: power-domain@105c4000 {
672 compatible = "samsung,exynos5433-pd";
674 #power-domain-cells = <0>;
678 pd_cam0: power-domain@105c4020 {
679 compatible = "samsung,exynos5433-pd";
681 #power-domain-cells = <0>;
682 power-domains = <&pd_cam1>;
686 pd_mscl: power-domain@105c4040 {
687 compatible = "samsung,exynos5433-pd";
689 #power-domain-cells = <0>;
693 pd_g3d: power-domain@105c4060 {
694 compatible = "samsung,exynos5433-pd";
696 #power-domain-cells = <0>;
700 pd_disp: power-domain@105c4080 {
701 compatible = "samsung,exynos5433-pd";
703 #power-domain-cells = <0>;
707 pd_cam1: power-domain@105c40a0 {
708 compatible = "samsung,exynos5433-pd";
710 #power-domain-cells = <0>;
714 pd_aud: power-domain@105c40c0 {
715 compatible = "samsung,exynos5433-pd";
717 #power-domain-cells = <0>;
721 pd_g2d: power-domain@105c4120 {
722 compatible = "samsung,exynos5433-pd";
724 #power-domain-cells = <0>;
728 pd_isp: power-domain@105c4140 {
729 compatible = "samsung,exynos5433-pd";
731 #power-domain-cells = <0>;
732 power-domains = <&pd_cam0>;
736 pd_mfc: power-domain@105c4180 {
737 compatible = "samsung,exynos5433-pd";
739 #power-domain-cells = <0>;
743 pd_hevc: power-domain@105c41c0 {
744 compatible = "samsung,exynos5433-pd";
746 #power-domain-cells = <0>;
751 compatible = "samsung,exynos5433-tmu";
756 clock-names = "tmu_apbif", "tmu_sclk";
757 #thermal-sensor-cells = <0>;
762 compatible = "samsung,exynos5433-tmu";
767 clock-names = "tmu_apbif", "tmu_sclk";
768 #thermal-sensor-cells = <0>;
773 compatible = "samsung,exynos5433-tmu";
778 clock-names = "tmu_apbif", "tmu_sclk";
779 #thermal-sensor-cells = <0>;
784 compatible = "samsung,exynos5433-tmu";
789 clock-names = "tmu_apbif", "tmu_sclk";
790 #thermal-sensor-cells = <0>;
795 compatible = "samsung,exynos5433-tmu";
800 clock-names = "tmu_apbif", "tmu_sclk";
801 #thermal-sensor-cells = <0>;
806 compatible = "samsung,exynos5433-mct",
807 "samsung,exynos4210-mct";
822 clock-names = "fin_pll", "mct";
826 compatible = "samsung,exynos-ppmu-v2";
832 compatible = "samsung,exynos-ppmu-v2";
838 compatible = "samsung,exynos-ppmu-v2";
844 compatible = "samsung,exynos-ppmu-v2";
850 compatible = "samsung,exynos5433-pinctrl";
853 wakeup-interrupt-controller {
854 compatible = "samsung,exynos5433-wakeup-eint",
855 "samsung,exynos7-wakeup-eint";
861 compatible = "samsung,exynos5433-pinctrl";
864 power-domains = <&pd_aud>;
868 compatible = "samsung,exynos5433-pinctrl";
874 compatible = "samsung,exynos5433-pinctrl";
880 compatible = "samsung,exynos5433-pinctrl";
886 compatible = "samsung,exynos5433-pinctrl";
892 compatible = "samsung,exynos5433-pinctrl";
898 compatible = "samsung,exynos5433-pinctrl";
904 compatible = "samsung,exynos5433-pinctrl";
910 compatible = "samsung,exynos5433-pinctrl";
915 pmu_system_controller: system-controller@105c0000 {
916 compatible = "samsung,exynos5433-pmu", "simple-mfd", "syscon";
918 #clock-cells = <1>;
919 clock-names = "clkout16";
922 mipi_phy: mipi-phy {
923 compatible = "samsung,exynos5433-mipi-video-phy";
924 #phy-cells = <1>;
925 samsung,cam0-sysreg = <&syscon_cam0>;
926 samsung,cam1-sysreg = <&syscon_cam1>;
927 samsung,disp-sysreg = <&syscon_disp>;
930 reboot: syscon-reboot {
931 compatible = "syscon-reboot";
938 gic: interrupt-controller@11001000 {
939 compatible = "arm,gic-400";
940 #interrupt-cells = <3>;
941 interrupt-controller;
950 compatible = "samsung,exynos5433-decon";
963 clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
968 power-domains = <&pd_disp>;
969 interrupt-names = "fifo", "vsync", "lcd_sys";
973 samsung,disp-sysreg = <&syscon_disp>;
976 iommu-names = "m0", "m1";
979 #address-cells = <1>;
980 #size-cells = <0>;
985 remote-endpoint =
993 compatible = "samsung,exynos5433-decon-tv";
1006 clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
1011 samsung,disp-sysreg = <&syscon_disp>;
1012 power-domains = <&pd_disp>;
1013 interrupt-names = "fifo", "vsync", "lcd_sys";
1019 iommu-names = "m0", "m1";
1023 compatible = "samsung,exynos5433-mipi-dsi";
1027 phy-names = "dsim";
1033 clock-names = "bus_clk",
1038 power-domains = <&pd_disp>;
1040 #address-cells = <1>;
1041 #size-cells = <0>;
1044 #address-cells = <1>;
1045 #size-cells = <0>;
1050 remote-endpoint = <&mic_to_dsi>;
1057 compatible = "samsung,exynos5433-mic";
1061 clock-names = "pclk_mic0", "sclk_rgb_vclk_to_mic0";
1062 power-domains = <&pd_disp>;
1063 samsung,disp-syscon = <&syscon_disp>;
1067 #address-cells = <1>;
1068 #size-cells = <0>;
1073 remote-endpoint =
1081 remote-endpoint = <&dsi_to_mic>;
1088 compatible = "samsung,exynos5433-hdmi";
1100 clock-names = "hdmi_pclk", "hdmi_i_pclk",
1107 samsung,syscon-phandle = <&pmu_system_controller>;
1108 samsung,sysreg-phandle = <&syscon_disp>;
1109 #sound-dai-cells = <0>;
1118 compatible = "samsung,exynos5433-disp-sysreg",
1119 "samsung,exynos5433-sysreg", "syscon";
1124 compatible = "samsung,exynos5433-cam0-sysreg",
1125 "samsung,exynos5433-sysreg", "syscon";
1130 compatible = "samsung,exynos5433-cam1-sysreg",
1131 "samsung,exynos5433-sysreg", "syscon";
1136 compatible = "samsung,exynos5433-fsys-sysreg",
1137 "samsung,exynos5433-sysreg", "syscon";
1141 gsc_0: video-scaler@13c00000 {
1142 compatible = "samsung,exynos5433-gsc";
1145 clock-names = "pclk", "aclk", "aclk_xiu",
1153 power-domains = <&pd_gscl>;
1156 gsc_1: video-scaler@13c10000 {
1157 compatible = "samsung,exynos5433-gsc";
1160 clock-names = "pclk", "aclk", "aclk_xiu",
1168 power-domains = <&pd_gscl>;
1171 gsc_2: video-scaler@13c20000 {
1172 compatible = "samsung,exynos5433-gsc";
1175 clock-names = "pclk", "aclk", "aclk_xiu",
1183 power-domains = <&pd_gscl>;
1187 compatible = "samsung,exynos5433-mali", "arm,mali-t760";
1192 interrupt-names = "job", "mmu", "gpu";
1194 clock-names = "core";
1195 power-domains = <&pd_g3d>;
1196 operating-points-v2 = <&gpu_opp_table>;
1199 gpu_opp_table: opp-table {
1200 compatible = "operating-points-v2";
1202 opp-160000000 {
1203 opp-hz = /bits/ 64 <160000000>;
1204 opp-microvolt = <1000000>;
1206 opp-267000000 {
1207 opp-hz = /bits/ 64 <267000000>;
1208 opp-microvolt = <1000000>;
1210 opp-350000000 {
1211 opp-hz = /bits/ 64 <350000000>;
1212 opp-microvolt = <1025000>;
1214 opp-420000000 {
1215 opp-hz = /bits/ 64 <420000000>;
1216 opp-microvolt = <1025000>;
1218 opp-500000000 {
1219 opp-hz = /bits/ 64 <500000000>;
1220 opp-microvolt = <1075000>;
1222 opp-550000000 {
1223 opp-hz = /bits/ 64 <550000000>;
1224 opp-microvolt = <1125000>;
1226 opp-600000000 {
1227 opp-hz = /bits/ 64 <600000000>;
1228 opp-microvolt = <1150000>;
1230 opp-700000000 {
1231 opp-hz = /bits/ 64 <700000000>;
1232 opp-microvolt = <1150000>;
1238 compatible = "samsung,exynos5433-scaler";
1241 clock-names = "pclk", "aclk", "aclk_xiu";
1246 power-domains = <&pd_mscl>;
1250 compatible = "samsung,exynos5433-scaler";
1253 clock-names = "pclk", "aclk", "aclk_xiu";
1258 power-domains = <&pd_mscl>;
1262 compatible = "samsung,exynos5433-jpeg";
1265 clock-names = "pclk", "aclk", "aclk_xiu", "sclk";
1271 power-domains = <&pd_mscl>;
1275 compatible = "samsung,exynos5433-mfc";
1278 clock-names = "pclk", "aclk", "aclk_xiu";
1283 iommu-names = "left", "right";
1284 power-domains = <&pd_mfc>;
1288 compatible = "samsung,exynos-sysmmu";
1291 clock-names = "aclk", "pclk";
1294 power-domains = <&pd_disp>;
1295 #iommu-cells = <0>;
1299 compatible = "samsung,exynos-sysmmu";
1302 clock-names = "aclk", "pclk";
1305 #iommu-cells = <0>;
1306 power-domains = <&pd_disp>;
1310 compatible = "samsung,exynos-sysmmu";
1313 clock-names = "aclk", "pclk";
1316 #iommu-cells = <0>;
1317 power-domains = <&pd_disp>;
1321 compatible = "samsung,exynos-sysmmu";
1324 clock-names = "aclk", "pclk";
1327 #iommu-cells = <0>;
1328 power-domains = <&pd_disp>;
1332 compatible = "samsung,exynos-sysmmu";
1335 clock-names = "aclk", "pclk";
1338 #iommu-cells = <0>;
1339 power-domains = <&pd_gscl>;
1343 compatible = "samsung,exynos-sysmmu";
1346 clock-names = "aclk", "pclk";
1349 #iommu-cells = <0>;
1350 power-domains = <&pd_gscl>;
1354 compatible = "samsung,exynos-sysmmu";
1357 clock-names = "aclk", "pclk";
1360 #iommu-cells = <0>;
1361 power-domains = <&pd_gscl>;
1365 compatible = "samsung,exynos-sysmmu";
1368 clock-names = "aclk", "pclk";
1371 #iommu-cells = <0>;
1372 power-domains = <&pd_mscl>;
1376 compatible = "samsung,exynos-sysmmu";
1379 clock-names = "aclk", "pclk";
1382 #iommu-cells = <0>;
1383 power-domains = <&pd_mscl>;
1387 compatible = "samsung,exynos-sysmmu";
1390 clock-names = "aclk", "pclk";
1393 #iommu-cells = <0>;
1394 power-domains = <&pd_mscl>;
1398 compatible = "samsung,exynos-sysmmu";
1401 clock-names = "aclk", "pclk";
1404 #iommu-cells = <0>;
1405 power-domains = <&pd_mfc>;
1409 compatible = "samsung,exynos-sysmmu";
1412 clock-names = "aclk", "pclk";
1415 #iommu-cells = <0>;
1416 power-domains = <&pd_mfc>;
1420 compatible = "samsung,exynos5433-uart";
1425 clock-names = "uart", "clk_uart_baud0";
1426 pinctrl-names = "default";
1427 pinctrl-0 = <&uart0_bus>;
1432 compatible = "samsung,exynos5433-uart";
1437 clock-names = "uart", "clk_uart_baud0";
1438 pinctrl-names = "default";
1439 pinctrl-0 = <&uart1_bus>;
1444 compatible = "samsung,exynos5433-uart";
1449 clock-names = "uart", "clk_uart_baud0";
1450 pinctrl-names = "default";
1451 pinctrl-0 = <&uart2_bus>;
1456 compatible = "samsung,exynos5433-spi";
1460 dma-names = "tx", "rx";
1461 #address-cells = <1>;
1462 #size-cells = <0>;
1466 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1467 samsung,spi-src-clk = <0>;
1468 pinctrl-names = "default";
1469 pinctrl-0 = <&spi0_bus>;
1470 num-cs = <1>;
1471 fifo-depth = <256>;
1476 compatible = "samsung,exynos5433-spi";
1480 dma-names = "tx", "rx";
1481 #address-cells = <1>;
1482 #size-cells = <0>;
1486 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1487 samsung,spi-src-clk = <0>;
1488 pinctrl-names = "default";
1489 pinctrl-0 = <&spi1_bus>;
1490 num-cs = <1>;
1491 fifo-depth = <64>;
1496 compatible = "samsung,exynos5433-spi";
1500 dma-names = "tx", "rx";
1501 #address-cells = <1>;
1502 #size-cells = <0>;
1506 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1507 samsung,spi-src-clk = <0>;
1508 pinctrl-names = "default";
1509 pinctrl-0 = <&spi2_bus>;
1510 num-cs = <1>;
1511 fifo-depth = <64>;
1516 compatible = "samsung,exynos5433-spi";
1520 dma-names = "tx", "rx";
1521 #address-cells = <1>;
1522 #size-cells = <0>;
1526 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1527 samsung,spi-src-clk = <0>;
1528 pinctrl-names = "default";
1529 pinctrl-0 = <&spi3_bus>;
1530 num-cs = <1>;
1531 fifo-depth = <64>;
1536 compatible = "samsung,exynos5433-spi";
1540 dma-names = "tx", "rx";
1541 #address-cells = <1>;
1542 #size-cells = <0>;
1546 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1547 samsung,spi-src-clk = <0>;
1548 pinctrl-names = "default";
1549 pinctrl-0 = <&spi4_bus>;
1550 num-cs = <1>;
1551 fifo-depth = <64>;
1556 compatible = "samsung,exynos5433-adc", "samsung,exynos7-adc";
1559 clock-names = "adc";
1561 #io-channel-cells = <1>;
1565 i2s1: i2s@14d60000 {
1566 compatible = "samsung,exynos5433-i2s", "samsung,exynos7-i2s";
1569 dma-names = "tx", "rx";
1574 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
1575 #clock-cells = <1>;
1576 #sound-dai-cells = <1>;
1581 compatible = "samsung,exynos5433-pwm", "samsung,exynos4210-pwm";
1588 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
1590 clock-names = "timers";
1591 #pwm-cells = <3>;
1596 compatible = "samsung,exynos5433-hsi2c",
1597 "samsung,exynos7-hsi2c";
1600 #address-cells = <1>;
1601 #size-cells = <0>;
1602 pinctrl-names = "default";
1603 pinctrl-0 = <&hs_i2c0_bus>;
1605 clock-names = "hsi2c";
1610 compatible = "samsung,exynos5433-hsi2c",
1611 "samsung,exynos7-hsi2c";
1614 #address-cells = <1>;
1615 #size-cells = <0>;
1616 pinctrl-names = "default";
1617 pinctrl-0 = <&hs_i2c1_bus>;
1619 clock-names = "hsi2c";
1624 compatible = "samsung,exynos5433-hsi2c",
1625 "samsung,exynos7-hsi2c";
1628 #address-cells = <1>;
1629 #size-cells = <0>;
1630 pinctrl-names = "default";
1631 pinctrl-0 = <&hs_i2c2_bus>;
1633 clock-names = "hsi2c";
1638 compatible = "samsung,exynos5433-hsi2c",
1639 "samsung,exynos7-hsi2c";
1642 #address-cells = <1>;
1643 #size-cells = <0>;
1644 pinctrl-names = "default";
1645 pinctrl-0 = <&hs_i2c3_bus>;
1647 clock-names = "hsi2c";
1652 compatible = "samsung,exynos5433-hsi2c",
1653 "samsung,exynos7-hsi2c";
1656 #address-cells = <1>;
1657 #size-cells = <0>;
1658 pinctrl-names = "default";
1659 pinctrl-0 = <&hs_i2c4_bus>;
1661 clock-names = "hsi2c";
1666 compatible = "samsung,exynos5433-hsi2c",
1667 "samsung,exynos7-hsi2c";
1670 #address-cells = <1>;
1671 #size-cells = <0>;
1672 pinctrl-names = "default";
1673 pinctrl-0 = <&hs_i2c5_bus>;
1675 clock-names = "hsi2c";
1680 compatible = "samsung,exynos5433-hsi2c",
1681 "samsung,exynos7-hsi2c";
1684 #address-cells = <1>;
1685 #size-cells = <0>;
1686 pinctrl-names = "default";
1687 pinctrl-0 = <&hs_i2c6_bus>;
1689 clock-names = "hsi2c";
1694 compatible = "samsung,exynos5433-hsi2c",
1695 "samsung,exynos7-hsi2c";
1698 #address-cells = <1>;
1699 #size-cells = <0>;
1700 pinctrl-names = "default";
1701 pinctrl-0 = <&hs_i2c7_bus>;
1703 clock-names = "hsi2c";
1708 compatible = "samsung,exynos5433-hsi2c",
1709 "samsung,exynos7-hsi2c";
1712 #address-cells = <1>;
1713 #size-cells = <0>;
1714 pinctrl-names = "default";
1715 pinctrl-0 = <&hs_i2c8_bus>;
1717 clock-names = "hsi2c";
1722 compatible = "samsung,exynos5433-hsi2c",
1723 "samsung,exynos7-hsi2c";
1726 #address-cells = <1>;
1727 #size-cells = <0>;
1728 pinctrl-names = "default";
1729 pinctrl-0 = <&hs_i2c9_bus>;
1731 clock-names = "hsi2c";
1736 compatible = "samsung,exynos5433-hsi2c",
1737 "samsung,exynos7-hsi2c";
1740 #address-cells = <1>;
1741 #size-cells = <0>;
1742 pinctrl-names = "default";
1743 pinctrl-0 = <&hs_i2c10_bus>;
1745 clock-names = "hsi2c";
1750 compatible = "samsung,exynos5433-hsi2c",
1751 "samsung,exynos7-hsi2c";
1754 #address-cells = <1>;
1755 #size-cells = <0>;
1756 pinctrl-names = "default";
1757 pinctrl-0 = <&hs_i2c11_bus>;
1759 clock-names = "hsi2c";
1764 compatible = "samsung,exynos5433-dwusb3";
1769 clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
1770 #address-cells = <1>;
1771 #size-cells = <1>;
1780 clock-names = "ref", "bus_early", "suspend";
1784 phy-names = "usb2-phy", "usb3-phy";
1789 compatible = "samsung,exynos5433-usbdrd-phy";
1795 clock-names = "phy", "ref", "phy_utmi", "phy_pipe",
1797 #phy-cells = <1>;
1798 samsung,pmu-syscon = <&pmu_system_controller>;
1803 compatible = "samsung,exynos5433-usbdrd-phy";
1809 clock-names = "phy", "ref", "phy_utmi", "phy_pipe",
1811 #phy-cells = <1>;
1812 samsung,pmu-syscon = <&pmu_system_controller>;
1817 compatible = "samsung,exynos5433-dwusb3";
1822 clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
1823 #address-cells = <1>;
1824 #size-cells = <1>;
1833 clock-names = "ref", "bus_early", "suspend";
1837 phy-names = "usb2-phy", "usb3-phy";
1842 compatible = "samsung,exynos5433-dw-mshc-smu",
1843 "samsung,exynos7-dw-mshc-smu";
1845 #address-cells = <1>;
1846 #size-cells = <0>;
1850 clock-names = "biu", "ciu";
1851 fifo-depth = <0x40>;
1856 compatible = "samsung,exynos5433-dw-mshc-smu",
1857 "samsung,exynos7-dw-mshc-smu";
1859 #address-cells = <1>;
1860 #size-cells = <0>;
1864 clock-names = "biu", "ciu";
1865 fifo-depth = <0x40>;
1870 compatible = "samsung,exynos5433-dw-mshc-smu",
1871 "samsung,exynos7-dw-mshc-smu";
1873 #address-cells = <1>;
1874 #size-cells = <0>;
1878 clock-names = "biu", "ciu";
1879 fifo-depth = <0x40>;
1883 pdma0: dma-controller@15610000 {
1888 clock-names = "apb_pclk";
1889 #dma-cells = <1>;
1892 pdma1: dma-controller@15600000 {
1897 clock-names = "apb_pclk";
1898 #dma-cells = <1>;
1901 audio-subsystem@11400000 {
1902 compatible = "samsung,exynos5433-lpass";
1905 clock-names = "sfr0_ctrl";
1906 power-domains = <&pd_aud>;
1907 #address-cells = <1>;
1908 #size-cells = <1>;
1911 adma: dma-controller@11420000 {
1916 clock-names = "apb_pclk";
1917 #dma-cells = <1>;
1918 power-domains = <&pd_aud>;
1921 i2s0: i2s@11440000 {
1922 compatible = "samsung,exynos5433-i2s",
1923 "samsung,exynos7-i2s";
1926 dma-names = "tx", "rx";
1928 #address-cells = <1>;
1929 #size-cells = <0>;
1933 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
1934 #clock-cells = <1>;
1935 pinctrl-names = "default";
1936 pinctrl-0 = <&i2s0_bus>;
1937 power-domains = <&pd_aud>;
1938 #sound-dai-cells = <1>;
1943 compatible = "samsung,exynos5433-uart";
1948 clock-names = "uart", "clk_uart_baud0";
1949 pinctrl-names = "default";
1950 pinctrl-0 = <&uart_aud_bus>;
1951 power-domains = <&pd_aud>;
1956 pcie_phy: pcie-phy@15680000 {
1957 compatible = "samsung,exynos5433-pcie-phy";
1959 samsung,pmu-syscon = <&pmu_system_controller>;
1960 samsung,fsys-sysreg = <&syscon_fsys>;
1961 #phy-cells = <0>;
1966 compatible = "samsung,exynos5433-pcie";
1969 reg-names = "dbi", "elbi", "config";
1970 #address-cells = <3>;
1971 #size-cells = <2>;
1972 #interrupt-cells = <1>;
1977 clock-names = "pcie", "pcie_bus";
1978 num-lanes = <1>;
1979 num-viewport = <3>;
1980 bus-range = <0x00 0xff>;
1989 compatible = "arm,armv8-timer";
2001 #include "exynos5433-bus.dtsi"
2002 #include "exynos5433-pinctrl.dtsi"
2003 #include "exynos5433-tmu.dtsi"