Lines Matching +full:gic +full:- +full:timer

1 // SPDX-License-Identifier: GPL-2.0-or-later
6  * Copyright (c) 2013-2016 Broadcom
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 	compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
15 	interrupt-parent = <&gic>;
16 	#address-cells = <2>;
17 	#size-cells = <2>;
21 		#address-cells = <0x2>;
22 		#size-cells = <0x0>;
28 			enable-method = "psci";
35 			enable-method = "psci";
42 			enable-method = "psci";
49 			enable-method = "psci";
54 		compatible = "arm,psci-0.2";
58 	gic: interrupt-controller@4000080000 {  label
59 		compatible = "arm,gic-v3";
60 		#interrupt-cells = <3>;
61 		#address-cells = <2>;
62 		#size-cells = <2>;
64 		interrupt-controller;
65 		#redistributor-regions = <1>;
70 		gicits: msi-controller@4000100000 {
71 			compatible = "arm,gic-v3-its";
72 			msi-controller;
73 			reg = <0x04 0x00100000 0x0 0x20000>;	/* GIC ITS */
77 	timer {
78 		compatible = "arm,armv8-timer";
86 		compatible = "brcm,vulcan-pmu";
91 		compatible = "fixed-clock";
92 		#clock-cells = <0>;
93 		clock-frequency = <125000000>;
94 		clock-output-names = "clk125mhz";
98 		compatible = "pci-host-ecam-generic";
100 		#interrupt-cells = <1>;
101 		#address-cells = <3>;
102 		#size-cells = <2>;
104 		/* ECAM at 0x3000_0000 - 0x4000_0000 */
110 		 *   MEM        0x4000_0000 - 0x6000_0000
111 		 *   MEM64 pref 0x40_0000_0000 - 0x60_0000_0000
116 		bus-range = <0 0xff>;
117 		interrupt-map-mask = <0 0 0 7>;
118 		interrupt-map =
120 			<0 0 0  1  &gic   0 0    GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
121 			 0 0 0  2  &gic   0 0    GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
122 			 0 0 0  3  &gic   0 0    GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
123 			 0 0 0  4  &gic   0 0    GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
124 		msi-parent = <&gicits>;
125 		dma-coherent;
129 		compatible = "simple-bus";
130 		#address-cells = <2>;
131 		#size-cells = <2>;
137 			interrupt-parent = <&gic>;
140 			clock-names = "apb_pclk";