Lines Matching +full:nand +full:- +full:cache
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <2>;
12 #size-cells = <2>;
14 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <0>;
21 compatible = "brcm,brahma-b53";
24 next-level-cache = <&L2_0>;
25 enable-method = "psci";
29 compatible = "brcm,brahma-b53";
32 next-level-cache = <&L2_0>;
33 enable-method = "psci";
37 compatible = "brcm,brahma-b53";
40 next-level-cache = <&L2_0>;
41 enable-method = "psci";
45 compatible = "brcm,brahma-b53";
48 next-level-cache = <&L2_0>;
49 enable-method = "psci";
51 L2_0: l2-cache0 {
52 compatible = "cache";
53 cache-level = <2>;
54 cache-unified;
59 compatible = "arm,armv8-timer";
67 compatible = "arm,armv8-pmuv3";
72 interrupt-affinity = <&B53_0>, <&B53_1>,
77 periph_clk:periph-clk {
78 compatible = "fixed-clock";
79 #clock-cells = <0>;
80 clock-frequency = <200000000>;
83 hsspi_pll: hsspi-pll {
84 compatible = "fixed-clock";
85 #clock-cells = <0>;
86 clock-frequency = <400000000>;
91 compatible = "arm,psci-0.2";
96 compatible = "simple-bus";
97 #address-cells = <1>;
98 #size-cells = <1>;
101 gic: interrupt-controller@1000 {
102 compatible = "arm,gic-400";
103 #interrupt-cells = <3>;
104 interrupt-controller;
116 compatible = "simple-bus";
117 #address-cells = <1>;
118 #size-cells = <1>;
121 twd: timer-mfd@400 {
122 compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
126 #address-cells = <1>;
127 #size-cells = <1>;
130 compatible = "brcm,bcm63138-timer";
135 compatible = "brcm,bcm6345-wdt";
142 compatible = "brcm,bcm6345-gpio";
144 reg-names = "dirout", "dat";
145 gpio-controller;
146 #gpio-cells = <2>;
152 compatible = "brcm,bcm6345-gpio";
154 reg-names = "dirout", "dat";
155 gpio-controller;
156 #gpio-cells = <2>;
162 compatible = "brcm,bcm6345-gpio";
164 reg-names = "dirout", "dat";
165 gpio-controller;
166 #gpio-cells = <2>;
172 compatible = "brcm,bcm6345-gpio";
174 reg-names = "dirout", "dat";
175 gpio-controller;
176 #gpio-cells = <2>;
182 compatible = "brcm,bcm6345-gpio";
184 reg-names = "dirout", "dat";
185 gpio-controller;
186 #gpio-cells = <2>;
192 compatible = "brcm,bcm6345-gpio";
194 reg-names = "dirout", "dat";
195 gpio-controller;
196 #gpio-cells = <2>;
202 compatible = "brcm,bcm6345-gpio";
204 reg-names = "dirout", "dat";
205 gpio-controller;
206 #gpio-cells = <2>;
212 compatible = "brcm,bcm6345-gpio";
214 reg-names = "dirout", "dat";
215 gpio-controller;
216 #gpio-cells = <2>;
221 compatible = "brcm,bcm6345-uart";
225 clock-names = "refclk";
230 compatible = "brcm,bcm6345-uart";
234 clock-names = "refclk";
238 leds: led-controller@800 {
239 #address-cells = <1>;
240 #size-cells = <0>;
241 compatible = "brcm,bcm63138-leds";
247 compatible = "brcm,iproc-rng200";
253 #address-cells = <1>;
254 #size-cells = <0>;
255 compatible = "brcm,bcm6858-hsspi", "brcm,bcmbca-hsspi-v1.0";
259 clock-names = "hsspi", "pll";
260 num-cs = <8>;
264 nand_controller: nand-controller@1800 {
265 #address-cells = <1>;
266 #size-cells = <0>;
267 compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
269 reg-names = "nand", "nand-int-base";
272 nandcs: nand@0 {
278 pl081_dma: dma-controller@59000 {
281 arm,primecell-periphid = <0x00041081>;
284 memcpy-burst-size = <256>;
285 memcpy-bus-width = <32>;
287 clock-names = "apb_pclk";
288 #dma-cells = <2>;