Lines Matching +full:v2m +full:- +full:memory +full:- +full:map
1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 #address-cells = <1>;
14 #size-cells = <1>;
18 frame-number = <1>;
30 #mbox-cells = <1>;
32 clock-names = "apb_pclk";
36 compatible = "arm,mmu-400", "arm,smmu-v1";
40 #iommu-cells = <1>;
41 #global-interrupts = <1>;
42 power-domains = <&scpi_devpd 1>;
43 dma-coherent;
48 compatible = "arm,mmu-401", "arm,smmu-v1";
52 #iommu-cells = <1>;
53 #global-interrupts = <1>;
54 dma-coherent;
59 compatible = "arm,mmu-401", "arm,smmu-v1";
63 #iommu-cells = <1>;
64 #global-interrupts = <1>;
65 dma-coherent;
66 power-domains = <&scpi_devpd 0>;
69 gic: interrupt-controller@2c010000 {
70 compatible = "arm,gic-400", "arm,cortex-a15-gic";
75 #address-cells = <1>;
76 #interrupt-cells = <3>;
77 #size-cells = <1>;
78 interrupt-controller;
82 v2m_0: v2m@0 {
83 compatible = "arm,gic-v2m-frame";
84 msi-controller;
88 v2m@10000 {
89 compatible = "arm,gic-v2m-frame";
90 msi-controller;
94 v2m@20000 {
95 compatible = "arm,gic-v2m-frame";
96 msi-controller;
100 v2m@30000 {
101 compatible = "arm,gic-v2m-frame";
102 msi-controller;
108 compatible = "arm,armv8-timer";
121 compatible = "arm,coresight-tmc", "arm,primecell";
125 clock-names = "apb_pclk";
126 power-domains = <&scpi_devpd 0>;
128 in-ports {
131 remote-endpoint = <&main_funnel_out_port>;
136 out-ports {
145 compatible = "arm,coresight-tpiu", "arm,primecell";
149 clock-names = "apb_pclk";
150 power-domains = <&scpi_devpd 0>;
151 in-ports {
154 remote-endpoint = <&replicator_out_port0>;
162 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
166 clock-names = "apb_pclk";
167 power-domains = <&scpi_devpd 0>;
169 out-ports {
172 remote-endpoint = <&etf0_in_port>;
177 main_funnel_in_ports: in-ports {
178 #address-cells = <1>;
179 #size-cells = <0>;
184 remote-endpoint = <&cluster0_funnel_out_port>;
191 remote-endpoint = <&cluster1_funnel_out_port>;
198 compatible = "arm,coresight-tmc", "arm,primecell";
203 clock-names = "apb_pclk";
204 power-domains = <&scpi_devpd 0>;
205 arm,scatter-gather;
206 in-ports {
209 remote-endpoint = <&replicator_out_port1>;
216 compatible = "arm,coresight-stm", "arm,primecell";
219 reg-names = "stm-base", "stm-stimulus-base";
222 clock-names = "apb_pclk";
223 power-domains = <&scpi_devpd 0>;
224 out-ports {
233 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
237 clock-names = "apb_pclk";
238 power-domains = <&scpi_devpd 0>;
240 out-ports {
241 #address-cells = <1>;
242 #size-cells = <0>;
248 remote-endpoint = <&tpiu_in_port>;
255 remote-endpoint = <&etr_in_port>;
259 in-ports {
267 cpu_debug0: cpu-debug@22010000 {
268 compatible = "arm,coresight-cpu-debug", "arm,primecell";
272 clock-names = "apb_pclk";
273 power-domains = <&scpi_devpd 0>;
277 compatible = "arm,coresight-etm4x", "arm,primecell";
281 clock-names = "apb_pclk";
282 power-domains = <&scpi_devpd 0>;
283 out-ports {
286 remote-endpoint = <&cluster0_funnel_in_port0>;
293 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
298 clock-names = "apb_pclk";
299 power-domains = <&scpi_devpd 0>;
301 arm,cs-dev-assoc = <&etm0>;
305 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
309 clock-names = "apb_pclk";
310 power-domains = <&scpi_devpd 0>;
311 out-ports {
314 remote-endpoint = <&main_funnel_in_port0>;
319 in-ports {
320 #address-cells = <1>;
321 #size-cells = <0>;
326 remote-endpoint = <&cluster0_etm0_out_port>;
333 remote-endpoint = <&cluster0_etm1_out_port>;
339 cpu_debug1: cpu-debug@22110000 {
340 compatible = "arm,coresight-cpu-debug", "arm,primecell";
344 clock-names = "apb_pclk";
345 power-domains = <&scpi_devpd 0>;
349 compatible = "arm,coresight-etm4x", "arm,primecell";
353 clock-names = "apb_pclk";
354 power-domains = <&scpi_devpd 0>;
355 out-ports {
358 remote-endpoint = <&cluster0_funnel_in_port1>;
365 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
370 clock-names = "apb_pclk";
371 power-domains = <&scpi_devpd 0>;
373 arm,cs-dev-assoc = <&etm1>;
376 cpu_debug2: cpu-debug@23010000 {
377 compatible = "arm,coresight-cpu-debug", "arm,primecell";
381 clock-names = "apb_pclk";
382 power-domains = <&scpi_devpd 0>;
386 compatible = "arm,coresight-etm4x", "arm,primecell";
390 clock-names = "apb_pclk";
391 power-domains = <&scpi_devpd 0>;
392 out-ports {
395 remote-endpoint = <&cluster1_funnel_in_port0>;
402 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
407 clock-names = "apb_pclk";
408 power-domains = <&scpi_devpd 0>;
410 arm,cs-dev-assoc = <&etm2>;
414 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
418 clock-names = "apb_pclk";
419 power-domains = <&scpi_devpd 0>;
420 out-ports {
423 remote-endpoint = <&main_funnel_in_port1>;
428 in-ports {
429 #address-cells = <1>;
430 #size-cells = <0>;
435 remote-endpoint = <&cluster1_etm0_out_port>;
442 remote-endpoint = <&cluster1_etm1_out_port>;
448 remote-endpoint = <&cluster1_etm2_out_port>;
454 remote-endpoint = <&cluster1_etm3_out_port>;
460 cpu_debug3: cpu-debug@23110000 {
461 compatible = "arm,coresight-cpu-debug", "arm,primecell";
465 clock-names = "apb_pclk";
466 power-domains = <&scpi_devpd 0>;
470 compatible = "arm,coresight-etm4x", "arm,primecell";
474 clock-names = "apb_pclk";
475 power-domains = <&scpi_devpd 0>;
476 out-ports {
479 remote-endpoint = <&cluster1_funnel_in_port1>;
486 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
491 clock-names = "apb_pclk";
492 power-domains = <&scpi_devpd 0>;
494 arm,cs-dev-assoc = <&etm3>;
497 cpu_debug4: cpu-debug@23210000 {
498 compatible = "arm,coresight-cpu-debug", "arm,primecell";
502 clock-names = "apb_pclk";
503 power-domains = <&scpi_devpd 0>;
507 compatible = "arm,coresight-etm4x", "arm,primecell";
511 clock-names = "apb_pclk";
512 power-domains = <&scpi_devpd 0>;
513 out-ports {
516 remote-endpoint = <&cluster1_funnel_in_port2>;
523 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
528 clock-names = "apb_pclk";
529 power-domains = <&scpi_devpd 0>;
531 arm,cs-dev-assoc = <&etm4>;
534 cpu_debug5: cpu-debug@23310000 {
535 compatible = "arm,coresight-cpu-debug", "arm,primecell";
539 clock-names = "apb_pclk";
540 power-domains = <&scpi_devpd 0>;
544 compatible = "arm,coresight-etm4x", "arm,primecell";
548 clock-names = "apb_pclk";
549 power-domains = <&scpi_devpd 0>;
550 out-ports {
553 remote-endpoint = <&cluster1_funnel_in_port3>;
560 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
565 clock-names = "apb_pclk";
566 power-domains = <&scpi_devpd 0>;
568 arm,cs-dev-assoc = <&etm5>;
572 compatible = "arm,coresight-cti", "arm,primecell";
576 clock-names = "apb_pclk";
577 power-domains = <&scpi_devpd 0>;
579 #address-cells = <1>;
580 #size-cells = <0>;
582 trig-conns@0 {
584 arm,trig-in-sigs = <2 3>;
585 arm,trig-in-types = <SNK_FULL SNK_ACQCOMP>;
586 arm,trig-out-sigs = <0 1>;
587 arm,trig-out-types = <SNK_FLUSHIN SNK_TRIGIN>;
588 arm,cs-dev-assoc = <&etr_sys>;
591 trig-conns@1 {
593 arm,trig-in-sigs = <0 1>;
594 arm,trig-in-types = <SNK_FULL SNK_ACQCOMP>;
595 arm,trig-out-sigs = <7 6>;
596 arm,trig-out-types = <SNK_FLUSHIN SNK_TRIGIN>;
597 arm,cs-dev-assoc = <&etf_sys0>;
600 trig-conns@2 {
602 arm,trig-in-sigs = <4 5 6 7>;
603 arm,trig-in-types = <STM_TOUT_SPTE STM_TOUT_SW
605 arm,trig-out-sigs = <4 5>;
606 arm,trig-out-types = <STM_HWEVENT STM_HWEVENT>;
607 arm,cs-dev-assoc = <&stm_sys>;
610 trig-conns@3 {
612 arm,trig-out-sigs = <2 3>;
613 arm,trig-out-types = <SNK_FLUSHIN SNK_TRIGIN>;
614 arm,cs-dev-assoc = <&tpiu_sys>;
619 compatible = "arm,coresight-cti", "arm,primecell";
623 clock-names = "apb_pclk";
624 power-domains = <&scpi_devpd 0>;
626 #address-cells = <1>;
627 #size-cells = <0>;
629 trig-conns@0 {
631 arm,trig-in-sigs = <0>;
632 arm,trig-in-types = <GEN_INTREQ>;
633 arm,trig-out-sigs = <0>;
634 arm,trig-out-types = <GEN_HALTREQ>;
635 arm,trig-conn-name = "sys_profiler";
638 trig-conns@1 {
640 arm,trig-out-sigs = <2 3>;
641 arm,trig-out-types = <GEN_HALTREQ GEN_RESTARTREQ>;
642 arm,trig-conn-name = "watchdog";
645 trig-conns@2 {
647 arm,trig-out-sigs = <1 6>;
648 arm,trig-out-types = <GEN_HALTREQ GEN_RESTARTREQ>;
649 arm,trig-conn-name = "g_counter";
654 compatible = "arm,juno-mali", "arm,mali-t624";
659 interrupt-names = "job", "mmu", "gpu";
661 power-domains = <&scpi_devpd 1>;
662 dma-coherent;
663 /* The SMMU is only really of interest to bare-metal hypervisors */
668 compatible = "arm,juno-sram-ns", "mmio-sram";
671 #address-cells = <1>;
672 #size-cells = <1>;
675 cpu_scp_lpri: scp-sram@0 {
676 compatible = "arm,juno-scp-shmem";
680 cpu_scp_hpri: scp-sram@200 {
681 compatible = "arm,juno-scp-shmem";
687 compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic";
690 bus-range = <0 255>;
691 linux,pci-domain = <0>;
692 #address-cells = <3>;
693 #size-cells = <2>;
694 dma-coherent;
699 dma-ranges = <0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x80000000>,
701 #interrupt-cells = <1>;
702 interrupt-map-mask = <0 0 0 7>;
703 interrupt-map = <0 0 0 1 &gic 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
707 msi-parent = <&v2m_0>;
709 iommu-map-mask = <0x0>; /* RC has no means to output PCI RID */
710 iommu-map = <0x0 &smmu_pcie 0x0 0x1>;
719 compatible = "arm,scpi-clocks";
721 scpi_dvfs: clocks-0 {
722 compatible = "arm,scpi-dvfs-clocks";
723 #clock-cells = <1>;
724 clock-indices = <0>, <1>, <2>;
725 clock-output-names = "atlclk", "aplclk","gpuclk";
727 scpi_clk: clocks-1 {
728 compatible = "arm,scpi-variable-clocks";
729 #clock-cells = <1>;
730 clock-indices = <3>;
731 clock-output-names = "pxlclk";
735 scpi_devpd: power-controller {
736 compatible = "arm,scpi-power-domains";
737 num-domains = <2>;
738 #power-domain-cells = <1>;
742 compatible = "arm,scpi-sensors";
743 #thermal-sensor-cells = <1>;
747 thermal-zones {
748 pmic-thermal {
749 polling-delay = <1000>;
750 polling-delay-passive = <100>;
751 thermal-sensors = <&scpi_sensors0 0>;
761 soc-thermal {
762 polling-delay = <1000>;
763 polling-delay-passive = <100>;
764 thermal-sensors = <&scpi_sensors0 3>;
774 big_cluster_thermal_zone: big-cl-thermal {
775 polling-delay = <1000>;
776 polling-delay-passive = <100>;
777 thermal-sensors = <&scpi_sensors0 21>;
781 little_cluster_thermal_zone: little-cl-thermal {
782 polling-delay = <1000>;
783 polling-delay-passive = <100>;
784 thermal-sensors = <&scpi_sensors0 22>;
788 gpu0_thermal_zone: gpu0-thermal {
789 polling-delay = <1000>;
790 polling-delay-passive = <100>;
791 thermal-sensors = <&scpi_sensors0 23>;
795 gpu1_thermal_zone: gpu1-thermal {
796 polling-delay = <1000>;
797 polling-delay-passive = <100>;
798 thermal-sensors = <&scpi_sensors0 24>;
804 compatible = "arm,mmu-401", "arm,smmu-v1";
808 #iommu-cells = <1>;
809 #global-interrupts = <1>;
810 dma-coherent;
814 compatible = "arm,mmu-401", "arm,smmu-v1";
818 #iommu-cells = <1>;
819 #global-interrupts = <1>;
823 compatible = "arm,mmu-401", "arm,smmu-v1";
827 #iommu-cells = <1>;
828 #global-interrupts = <1>;
832 compatible = "arm,mmu-401", "arm,smmu-v1";
836 #iommu-cells = <1>;
837 #global-interrupts = <1>;
838 dma-coherent;
841 dma-controller@7ff00000 {
844 #dma-cells = <1>;
864 clock-names = "apb_pclk";
873 clock-names = "pxlclk";
877 remote-endpoint = <&tda998x_1_input>;
888 clock-names = "pxlclk";
892 remote-endpoint = <&tda998x_0_input>;
902 clock-names = "uartclk", "apb_pclk";
906 compatible = "snps,designware-i2c";
908 #address-cells = <1>;
909 #size-cells = <0>;
911 clock-frequency = <400000>;
912 i2c-sda-hold-time-ns = <500>;
915 hdmi-transmitter@70 {
920 remote-endpoint = <&hdlcd0_output>;
925 hdmi-transmitter@71 {
930 remote-endpoint = <&hdlcd1_output>;
937 compatible = "generic-ohci";
945 compatible = "generic-ehci";
952 memory-controller@7ffd0000 {
958 clock-names = "apb_pclk";
961 memory@80000000 {
962 device_type = "memory";
963 /* last 16MB of the first memory area is reserved for secure world use by firmware */
969 #interrupt-cells = <1>;
970 interrupt-map-mask = <0 0 15>;
971 interrupt-map = <0 0 0 &gic 0 GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
986 site2: tlx-bus@60000000 {
987 compatible = "simple-bus";
988 #address-cells = <1>;
989 #size-cells = <1>;
991 #interrupt-cells = <1>;
992 interrupt-map-mask = <0 0>;
993 interrupt-map = <0 0 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;