Lines Matching +full:0 +full:x35044000
24 #size-cells = <0>;
58 cpu_e0: cpu@0 {
61 reg = <0x0 0x0>;
63 cpu-release-addr = <0 0>; /* To be filled by loader */
68 i-cache-size = <0x20000>;
69 d-cache-size = <0x10000>;
75 reg = <0x0 0x1>;
77 cpu-release-addr = <0 0>; /* To be filled by loader */
82 i-cache-size = <0x20000>;
83 d-cache-size = <0x10000>;
89 reg = <0x0 0x2>;
91 cpu-release-addr = <0 0>; /* To be filled by loader */
96 i-cache-size = <0x20000>;
97 d-cache-size = <0x10000>;
103 reg = <0x0 0x3>;
105 cpu-release-addr = <0 0>; /* To be filled by loader */
110 i-cache-size = <0x20000>;
111 d-cache-size = <0x10000>;
117 reg = <0x0 0x10100>;
119 cpu-release-addr = <0 0>; /* To be filled by loader */
124 i-cache-size = <0x30000>;
125 d-cache-size = <0x20000>;
131 reg = <0x0 0x10101>;
133 cpu-release-addr = <0 0>; /* To be filled by loader */
138 i-cache-size = <0x30000>;
139 d-cache-size = <0x20000>;
145 reg = <0x0 0x10102>;
147 cpu-release-addr = <0 0>; /* To be filled by loader */
152 i-cache-size = <0x30000>;
153 d-cache-size = <0x20000>;
159 reg = <0x0 0x10103>;
161 cpu-release-addr = <0 0>; /* To be filled by loader */
166 i-cache-size = <0x30000>;
167 d-cache-size = <0x20000>;
170 l2_cache_0: l2-cache-0 {
174 cache-size = <0x400000>;
181 cache-size = <0x1000000>;
185 ecluster_opp: opp-table-0 {
301 #if 0
347 #clock-cells = <0>;
354 #clock-cells = <0>;
365 #clock-cells = <0>;
379 reg = <0x2 0x10e20000 0 0x1000>;
380 #performance-domain-cells = <0>;
385 reg = <0x2 0x11e20000 0 0x1000>;
386 #performance-domain-cells = <0>;
391 reg = <0x2 0x28200000 0x0 0xc000>,
392 <0x2 0x28400000 0x0 0x4000>;
399 iommus = <&displaydfr_dart 0>;
411 reg = <0x2 0x28304000 0x0 0x4000>;
421 reg = <0x2 0x28600000 0x0 0x100000>;
424 #size-cells = <0>;
429 #size-cells = <0>;
431 dfr_mipi_in: port@0 {
432 reg = <0>;
434 #size-cells = <0>;
436 dfr_mipi_in_adp: endpoint@0 {
437 reg = <0>;
445 #size-cells = <0>;
452 reg = <0x2 0x35004000 0x0 0x4000>;
461 reg = <0x2 0x35010000 0x0 0x4000>;
465 pinctrl-0 = <&i2c0_pins>;
467 #address-cells = <0x1>;
468 #size-cells = <0x0>;
475 reg = <0x2 0x35014000 0x0 0x4000>;
479 pinctrl-0 = <&i2c1_pins>;
481 #address-cells = <0x1>;
482 #size-cells = <0x0>;
489 reg = <0x2 0x35018000 0x0 0x4000>;
493 pinctrl-0 = <&i2c2_pins>;
495 #address-cells = <0x1>;
496 #size-cells = <0x0>;
503 reg = <0x2 0x3501c000 0x0 0x4000>;
507 pinctrl-0 = <&i2c3_pins>;
509 #address-cells = <0x1>;
510 #size-cells = <0x0>;
517 reg = <0x2 0x35020000 0x0 0x4000>;
521 pinctrl-0 = <&i2c4_pins>;
523 #address-cells = <0x1>;
524 #size-cells = <0x0>;
531 reg = <0x2 0x35044000 0x0 0x4000>;
540 reg = <0x2 0x35104000 0x0 0x4000>;
544 pinctrl-0 = <&spi1_pins>;
548 #size-cells = <0>;
554 reg = <0x2 0x3510c000 0x0 0x4000>;
558 pinctrl-0 = <&spi3_pins>;
562 #size-cells = <0>;
568 reg = <0x2 0x35200000 0x0 0x1000>;
584 reg = <0x2 0x35208000 0x0 0x1000>;
596 reg = <0x2 0x38200000 0x0 0x34000>;
598 interrupts-extended = <0>,
600 <0>,
601 <0>;
610 reg = <0x2 0x38400000 0x0 0x18000>,
611 <0x2 0x38300000 0x0 0x30000>;
622 clocks = <&nco 0>, <&nco 1>, <&nco 2>,
626 dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>,
644 reg = <0x2 0x3b044000 0x0 0x14000>;
653 reg = <0x2 0x3b0c0000 0x0 0x8000>,
654 <0x2 0x3b0c8000 0x0 0x4>;
675 reg = <0x2 0x3b700000 0 0x14000>;
681 reg = <0x2 0x3c100000 0x0 0x100000>;
686 gpio-ranges = <&pinctrl_ap 0 0 213>;
749 reg = <0x2 0x3d1f0000 0x0 0x4000>;
754 gpio-ranges = <&pinctrl_nub 0 0 24>;
773 reg = <0x2 0x3d280000 0 0x4000>;
779 reg = <0x2 0x3d2b0000 0x0 0x4000>;
787 reg = <0x2 0x3e820000 0x0 0x4000>;
791 gpio-ranges = <&pinctrl_smc 0 0 18>;
808 reg = <0x2 0x4a820000 0x0 0x4000>;
812 gpio-ranges = <&pinctrl_aop 0 0 54>;
829 reg = <0x2 0x77408000 0x0 0x4000>;
837 #mbox-cells = <0>;
843 reg = <0x2 0x7bc50000 0x0 0x10000>;
849 reg = <0x2 0x7bcc0000 0x0 0x40000>,
850 <0x2 0x77400000 0x0 0x4000>;
863 reg = <0x6 0x81008000 0x0 0x4000>;
872 reg = <0x6 0x82008000 0x0 0x4000>;
882 reg = <0x6 0x83008000 0x0 0x4000>;
892 reg = <0x6 0x84008000 0x0 0x4000>;
904 reg = <0x6 0x90000000 0x0 0x1000000>,
905 <0x6 0x80000000 0x0 0x100000>,
906 <0x6 0x81000000 0x0 0x4000>,
907 <0x6 0x82000000 0x0 0x4000>,
908 <0x6 0x83000000 0x0 0x4000>,
909 <0x6 0x84000000 0x0 0x4000>;
922 iommu-map = <0x100 &pcie0_dart 0 1>,
923 <0x200 &pcie1_dart 1 1>,
924 <0x300 &pcie2_dart 2 1>,
925 <0x400 &pcie3_dart 3 1>;
926 iommu-map-mask = <0xff00>;
928 bus-range = <0 4>;
931 ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
932 <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
935 pinctrl-0 = <&pcie_pins>;
938 port00: pci@0,0 {
940 reg = <0x0 0x0 0x0 0x0 0x0>;
950 interrupt-map-mask = <0 0 0 7>;
951 interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
952 <0 0 0 2 &port00 0 0 0 1>,
953 <0 0 0 3 &port00 0 0 0 2>,
954 <0 0 0 4 &port00 0 0 0 3>;
957 port01: pci@1,0 {
959 reg = <0x800 0x0 0x0 0x0 0x0>;
969 interrupt-map-mask = <0 0 0 7>;
970 interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
971 <0 0 0 2 &port01 0 0 0 1>,
972 <0 0 0 3 &port01 0 0 0 2>,
973 <0 0 0 4 &port01 0 0 0 3>;
978 port02: pci@2,0 {
980 reg = <0x1000 0x0 0x0 0x0 0x0>;
990 interrupt-map-mask = <0 0 0 7>;
991 interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
992 <0 0 0 2 &port02 0 0 0 1>,
993 <0 0 0 3 &port02 0 0 0 2>,
994 <0 0 0 4 &port02 0 0 0 3>;
1000 port03: pci@3,0 {
1002 reg = <0x1800 0x0 0x0 0x0 0x0>;
1012 interrupt-map-mask = <0 0 0 7>;
1013 interrupt-map = <0 0 0 1 &port03 0 0 0 0>,
1014 <0 0 0 2 &port03 0 0 0 1>,
1015 <0 0 0 3 &port03 0 0 0 2>,
1016 <0 0 0 4 &port03 0 0 0 3>;