Lines Matching +full:nvme +full:- +full:ans2

1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
14 #include <dt-bindings/spmi/spmi.h>
17 compatible = "apple,t8103", "apple,arm-platform";
19 #address-cells = <2>;
20 #size-cells = <2>;
27 #address-cells = <2>;
28 #size-cells = <0>;
30 cpu-map {
66 enable-method = "spin-table";
67 cpu-release-addr = <0 0>; /* To be filled by loader */
68 operating-points-v2 = <&ecluster_opp>;
69 capacity-dmips-mhz = <714>;
70 performance-domains = <&cpufreq_e>;
71 next-level-cache = <&l2_cache_0>;
72 i-cache-size = <0x20000>;
73 d-cache-size = <0x10000>;
80 enable-method = "spin-table";
81 cpu-release-addr = <0 0>; /* To be filled by loader */
82 operating-points-v2 = <&ecluster_opp>;
83 capacity-dmips-mhz = <714>;
84 performance-domains = <&cpufreq_e>;
85 next-level-cache = <&l2_cache_0>;
86 i-cache-size = <0x20000>;
87 d-cache-size = <0x10000>;
94 enable-method = "spin-table";
95 cpu-release-addr = <0 0>; /* To be filled by loader */
96 operating-points-v2 = <&ecluster_opp>;
97 capacity-dmips-mhz = <714>;
98 performance-domains = <&cpufreq_e>;
99 next-level-cache = <&l2_cache_0>;
100 i-cache-size = <0x20000>;
101 d-cache-size = <0x10000>;
108 enable-method = "spin-table";
109 cpu-release-addr = <0 0>; /* To be filled by loader */
110 operating-points-v2 = <&ecluster_opp>;
111 capacity-dmips-mhz = <714>;
112 performance-domains = <&cpufreq_e>;
113 next-level-cache = <&l2_cache_0>;
114 i-cache-size = <0x20000>;
115 d-cache-size = <0x10000>;
122 enable-method = "spin-table";
123 cpu-release-addr = <0 0>; /* To be filled by loader */
124 operating-points-v2 = <&pcluster_opp>;
125 capacity-dmips-mhz = <1024>;
126 performance-domains = <&cpufreq_p>;
127 next-level-cache = <&l2_cache_1>;
128 i-cache-size = <0x30000>;
129 d-cache-size = <0x20000>;
136 enable-method = "spin-table";
137 cpu-release-addr = <0 0>; /* To be filled by loader */
138 operating-points-v2 = <&pcluster_opp>;
139 capacity-dmips-mhz = <1024>;
140 performance-domains = <&cpufreq_p>;
141 next-level-cache = <&l2_cache_1>;
142 i-cache-size = <0x30000>;
143 d-cache-size = <0x20000>;
150 enable-method = "spin-table";
151 cpu-release-addr = <0 0>; /* To be filled by loader */
152 operating-points-v2 = <&pcluster_opp>;
153 capacity-dmips-mhz = <1024>;
154 performance-domains = <&cpufreq_p>;
155 next-level-cache = <&l2_cache_1>;
156 i-cache-size = <0x30000>;
157 d-cache-size = <0x20000>;
164 enable-method = "spin-table";
165 cpu-release-addr = <0 0>; /* To be filled by loader */
166 operating-points-v2 = <&pcluster_opp>;
167 capacity-dmips-mhz = <1024>;
168 performance-domains = <&cpufreq_p>;
169 next-level-cache = <&l2_cache_1>;
170 i-cache-size = <0x30000>;
171 d-cache-size = <0x20000>;
174 l2_cache_0: l2-cache-0 {
176 cache-level = <2>;
177 cache-unified;
178 cache-size = <0x400000>;
181 l2_cache_1: l2-cache-1 {
183 cache-level = <2>;
184 cache-unified;
185 cache-size = <0xc00000>;
189 ecluster_opp: opp-table-0 {
190 compatible = "operating-points-v2";
193 opp-hz = /bits/ 64 <600000000>;
194 opp-level = <1>;
195 clock-latency-ns = <7500>;
198 opp-hz = /bits/ 64 <972000000>;
199 opp-level = <2>;
200 clock-latency-ns = <22000>;
203 opp-hz = /bits/ 64 <1332000000>;
204 opp-level = <3>;
205 clock-latency-ns = <27000>;
208 opp-hz = /bits/ 64 <1704000000>;
209 opp-level = <4>;
210 clock-latency-ns = <33000>;
213 opp-hz = /bits/ 64 <2064000000>;
214 opp-level = <5>;
215 clock-latency-ns = <50000>;
219 pcluster_opp: opp-table-1 {
220 compatible = "operating-points-v2";
223 opp-hz = /bits/ 64 <600000000>;
224 opp-level = <1>;
225 clock-latency-ns = <8000>;
228 opp-hz = /bits/ 64 <828000000>;
229 opp-level = <2>;
230 clock-latency-ns = <19000>;
233 opp-hz = /bits/ 64 <1056000000>;
234 opp-level = <3>;
235 clock-latency-ns = <21000>;
238 opp-hz = /bits/ 64 <1284000000>;
239 opp-level = <4>;
240 clock-latency-ns = <23000>;
243 opp-hz = /bits/ 64 <1500000000>;
244 opp-level = <5>;
245 clock-latency-ns = <24000>;
248 opp-hz = /bits/ 64 <1728000000>;
249 opp-level = <6>;
250 clock-latency-ns = <29000>;
253 opp-hz = /bits/ 64 <1956000000>;
254 opp-level = <7>;
255 clock-latency-ns = <31000>;
258 opp-hz = /bits/ 64 <2184000000>;
259 opp-level = <8>;
260 clock-latency-ns = <34000>;
263 opp-hz = /bits/ 64 <2388000000>;
264 opp-level = <9>;
265 clock-latency-ns = <36000>;
268 opp-hz = /bits/ 64 <2592000000>;
269 opp-level = <10>;
270 clock-latency-ns = <51000>;
273 opp-hz = /bits/ 64 <2772000000>;
274 opp-level = <11>;
275 clock-latency-ns = <54000>;
278 opp-hz = /bits/ 64 <2988000000>;
279 opp-level = <12>;
280 clock-latency-ns = <55000>;
285 opp-hz = /bits/ 64 <3096000000>;
286 opp-level = <13>;
287 clock-latency-ns = <55000>;
288 turbo-mode;
291 opp-hz = /bits/ 64 <3144000000>;
292 opp-level = <14>;
293 clock-latency-ns = <56000>;
294 turbo-mode;
297 opp-hz = /bits/ 64 <3204000000>;
298 opp-level = <15>;
299 clock-latency-ns = <56000>;
300 turbo-mode;
306 compatible = "arm,armv8-timer";
307 interrupt-parent = <&aic>;
308 interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
315 pmu-e {
316 compatible = "apple,icestorm-pmu";
317 interrupt-parent = <&aic>;
321 pmu-p {
322 compatible = "apple,firestorm-pmu";
323 interrupt-parent = <&aic>;
327 clkref: clock-ref {
328 compatible = "fixed-clock";
329 #clock-cells = <0>;
330 clock-frequency = <24000000>;
331 clock-output-names = "clkref";
334 clk_120m: clock-120m {
335 compatible = "fixed-clock";
336 #clock-cells = <0>;
337 clock-frequency = <120000000>;
338 clock-output-names = "clk_120m";
341 clk_200m: clock-200m {
342 compatible = "fixed-clock";
343 #clock-cells = <0>;
344 clock-frequency = <200000000>;
345 clock-output-names = "clk_200m";
352 nco_clkref: clock-ref-nco {
353 compatible = "fixed-clock";
354 #clock-cells = <0>;
355 clock-output-names = "nco_ref";
358 reserved-memory {
359 #address-cells = <2>;
360 #size-cells = <2>;
367 gpu_hw_cal_a: hw-cal-a {
371 gpu_hw_cal_b: hw-cal-b {
375 uat_handoff: uat-handoff {
379 uat_pagetables: uat-pagetables {
383 uat_ttbs: uat-ttbs {
389 compatible = "simple-bus";
390 #address-cells = <2>;
391 #size-cells = <2>;
394 nonposted-mmio;
397 compatible = "apple,agx-g13g";
400 reg-names = "asc", "sgx";
402 power-domains = <&ps_gfx>;
403 memory-region = <&uat_ttbs>, <&uat_pagetables>, <&uat_handoff>,
405 memory-region-names = "ttbs", "pagetables", "handoff",
406 "hw-cal-a", "hw-cal-b", "globals";
408 apple,firmware-abi = <0 0 0>;
412 compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4";
414 interrupt-parent = <&aic>;
419 interrupt-names = "send-empty", "send-not-empty",
420 "recv-empty", "recv-not-empty";
421 #mbox-cells = <0>;
424 cpufreq_e: performance-controller@210e20000 {
425 compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
427 #performance-domain-cells = <0>;
430 cpufreq_p: performance-controller@211e20000 {
431 compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
433 #performance-domain-cells = <0>;
436 display_dfr: display-pipe@228200000 {
437 compatible = "apple,t8103-display-pipe", "apple,h7-display-pipe";
440 reg-names = "be", "fe";
441 power-domains = <&ps_dispdfr_fe>, <&ps_dispdfr_be>;
442 interrupt-parent = <&aic>;
445 interrupt-names = "be", "fe";
451 remote-endpoint = <&dfr_mipi_in_adp>;
457 compatible = "apple,t8103-dart";
459 interrupt-parent = <&aic>;
461 #iommu-cells = <1>;
462 power-domains = <&ps_dispdfr_fe>;
467 compatible = "apple,t8103-display-pipe-mipi", "apple,h7-display-pipe-mipi";
469 power-domains = <&ps_mipi_dsi>;
473 #address-cells = <1>;
474 #size-cells = <0>;
478 #address-cells = <1>;
479 #size-cells = <0>;
483 remote-endpoint = <&dfr_adp_out_mipi>;
489 #address-cells = <1>;
490 #size-cells = <0>;
496 compatible = "apple,t8103-dart";
498 interrupt-parent = <&aic>;
500 #iommu-cells = <1>;
501 power-domains = <&ps_sio_cpu>;
505 compatible = "apple,t8103-i2c", "apple,i2c";
508 interrupt-parent = <&aic>;
510 pinctrl-0 = <&i2c0_pins>;
511 pinctrl-names = "default";
512 #address-cells = <0x1>;
513 #size-cells = <0x0>;
514 power-domains = <&ps_i2c0>;
518 compatible = "apple,t8103-i2c", "apple,i2c";
521 interrupt-parent = <&aic>;
523 pinctrl-0 = <&i2c1_pins>;
524 pinctrl-names = "default";
525 #address-cells = <0x1>;
526 #size-cells = <0x0>;
527 power-domains = <&ps_i2c1>;
531 compatible = "apple,t8103-i2c", "apple,i2c";
534 interrupt-parent = <&aic>;
536 pinctrl-0 = <&i2c2_pins>;
537 pinctrl-names = "default";
538 #address-cells = <0x1>;
539 #size-cells = <0x0>;
541 power-domains = <&ps_i2c2>;
545 compatible = "apple,t8103-i2c", "apple,i2c";
548 interrupt-parent = <&aic>;
550 pinctrl-0 = <&i2c3_pins>;
551 pinctrl-names = "default";
552 #address-cells = <0x1>;
553 #size-cells = <0x0>;
554 power-domains = <&ps_i2c3>;
558 compatible = "apple,t8103-i2c", "apple,i2c";
561 interrupt-parent = <&aic>;
563 pinctrl-0 = <&i2c4_pins>;
564 pinctrl-names = "default";
565 #address-cells = <0x1>;
566 #size-cells = <0x0>;
567 power-domains = <&ps_i2c4>;
572 compatible = "apple,t8103-fpwm", "apple,s5l-fpwm";
574 power-domains = <&ps_fpwm1>;
576 #pwm-cells = <2>;
581 compatible = "apple,t8103-spi", "apple,spi";
583 interrupt-parent = <&aic>;
586 pinctrl-0 = <&spi0_pins>;
587 pinctrl-names = "default";
588 power-domains = <&ps_spi0>;
589 #address-cells = <1>;
590 #size-cells = <0>;
595 compatible = "apple,t8103-spi", "apple,spi";
597 interrupt-parent = <&aic>;
600 pinctrl-0 = <&spi1_pins>;
601 pinctrl-names = "default";
602 power-domains = <&ps_spi1>;
603 #address-cells = <1>;
604 #size-cells = <0>;
609 compatible = "apple,t8103-spi", "apple,spi";
611 interrupt-parent = <&aic>;
614 pinctrl-0 = <&spi3_pins>;
615 pinctrl-names = "default";
616 power-domains = <&ps_spi3>;
617 #address-cells = <1>;
618 #size-cells = <0>;
623 compatible = "apple,s5l-uart";
625 reg-io-width = <4>;
626 interrupt-parent = <&aic>;
633 clock-names = "uart", "clk_uart_baud0";
634 power-domains = <&ps_uart0>;
639 compatible = "apple,s5l-uart";
641 reg-io-width = <4>;
642 interrupt-parent = <&aic>;
645 clock-names = "uart", "clk_uart_baud0";
646 power-domains = <&ps_uart2>;
650 admac: dma-controller@238200000 {
651 compatible = "apple,t8103-admac", "apple,admac";
653 dma-channels = <24>;
654 interrupts-extended = <0>,
658 #dma-cells = <1>;
660 power-domains = <&ps_sio_adma>;
665 compatible = "apple,t8103-mca", "apple,mca";
669 interrupt-parent = <&aic>;
680 power-domains = <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>,
688 dma-names = "tx0a", "rx0a", "tx0b", "rx0b",
695 #sound-dai-cells = <1>;
698 nco: clock-controller@23b044000 {
699 compatible = "apple,t8103-nco", "apple,nco";
702 #clock-cells = <1>;
705 aic: interrupt-controller@23b100000 {
706 compatible = "apple,t8103-aic", "apple,aic";
707 #interrupt-cells = <3>;
708 interrupt-controller;
710 power-domains = <&ps_aic>;
713 e-core-pmu-affinity {
714 apple,fiq-index = <AIC_CPU_PMU_E>;
718 p-core-pmu-affinity {
719 apple,fiq-index = <AIC_CPU_PMU_P>;
725 pmgr: power-management@23b700000 {
726 compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
727 #address-cells = <1>;
728 #size-cells = <1>;
733 compatible = "apple,t8103-pinctrl", "apple,pinctrl";
735 power-domains = <&ps_gpio>;
737 gpio-controller;
738 #gpio-cells = <2>;
739 gpio-ranges = <&pinctrl_ap 0 0 212>;
742 interrupt-controller;
743 #interrupt-cells = <2>;
744 interrupt-parent = <&aic>;
753 i2c0_pins: i2c0-pins {
758 i2c1_pins: i2c1-pins {
763 i2c2_pins: i2c2-pins {
768 i2c3_pins: i2c3-pins {
773 i2c4_pins: i2c4-pins {
778 spi0_pins: spi0-pins {
784 spi1_pins: spi1-pins {
791 spi3_pins: spi3-pins {
798 pcie_pins: pcie-pins {
806 compatible = "apple,t8103-spmi", "apple,spmi";
808 #address-cells = <2>;
809 #size-cells = <0>;
812 compatible = "apple,sera-pmic", "apple,spmi-nvmem";
815 nvmem-layout {
816 compatible = "fixed-layout";
817 #address-cells = <1>;
818 #size-cells = <1>;
820 boot_stage: boot-stage@9f01 {
824 boot_error_count: boot-error-count@9f02,0 {
829 panic_count: panic-count@9f02,4 {
834 boot_error_stage: boot-error-stage@9f03 {
838 shutdown_flag: shutdown-flag@9f0f,3 {
843 fault_shadow: fault-shadow@a67b {
851 pm_setting: pm-setting@d001 {
855 rtc_offset: rtc-offset@d100 {
863 compatible = "apple,t8103-pinctrl", "apple,pinctrl";
865 power-domains = <&ps_nub_gpio>;
867 gpio-controller;
868 #gpio-cells = <2>;
869 gpio-ranges = <&pinctrl_nub 0 0 23>;
872 interrupt-controller;
873 #interrupt-cells = <2>;
874 interrupt-parent = <&aic>;
884 pmgr_mini: power-management@23d280000 {
885 compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
886 #address-cells = <1>;
887 #size-cells = <1>;
892 compatible = "apple,t8103-wdt", "apple,wdt";
895 interrupt-parent = <&aic>;
900 compatible = "apple,t8103-pinctrl", "apple,pinctrl";
903 gpio-controller;
904 #gpio-cells = <2>;
905 gpio-ranges = <&pinctrl_smc 0 0 16>;
908 interrupt-controller;
909 #interrupt-cells = <2>;
910 interrupt-parent = <&aic>;
921 compatible = "apple,t8103-pinctrl", "apple,pinctrl";
924 gpio-controller;
925 #gpio-cells = <2>;
926 gpio-ranges = <&pinctrl_aop 0 0 42>;
929 interrupt-controller;
930 #interrupt-cells = <2>;
931 interrupt-parent = <&aic>;
942 compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4";
944 interrupt-parent = <&aic>;
949 interrupt-names = "send-empty", "send-not-empty",
950 "recv-empty", "recv-not-empty";
951 #mbox-cells = <0>;
952 power-domains = <&ps_ans2>;
956 compatible = "apple,t8103-sart";
958 power-domains = <&ps_ans2>;
961 nvme@27bcc0000 {
962 compatible = "apple,t8103-nvme-ans2", "apple,nvme-ans2";
965 reg-names = "nvme", "ans";
966 interrupt-parent = <&aic>;
970 power-domains = <&ps_ans2>, <&ps_apcie_st>;
971 power-domain-names = "ans", "apcie0";
976 compatible = "apple,t8103-dart";
978 #iommu-cells = <1>;
979 interrupt-parent = <&aic>;
981 power-domains = <&ps_apcie_gp>;
985 compatible = "apple,t8103-dart";
987 #iommu-cells = <1>;
988 interrupt-parent = <&aic>;
990 power-domains = <&ps_apcie_gp>;
995 compatible = "apple,t8103-dart";
997 #iommu-cells = <1>;
998 interrupt-parent = <&aic>;
1000 power-domains = <&ps_apcie_gp>;
1005 compatible = "apple,t8103-pcie", "apple,pcie";
1013 reg-names = "config", "rc", "port0", "port1", "port2";
1015 interrupt-parent = <&aic>;
1020 msi-controller;
1021 msi-parent = <&pcie0>;
1022 msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
1025 iommu-map = <0x100 &pcie0_dart_0 1 1>,
1028 iommu-map-mask = <0xff00>;
1030 bus-range = <0 3>;
1031 #address-cells = <3>;
1032 #size-cells = <2>;
1036 power-domains = <&ps_apcie_gp>;
1037 pinctrl-0 = <&pcie_pins>;
1038 pinctrl-names = "default";
1043 reset-gpios = <&pinctrl_ap 152 GPIO_ACTIVE_LOW>;
1045 #address-cells = <3>;
1046 #size-cells = <2>;
1049 interrupt-controller;
1050 #interrupt-cells = <1>;
1052 interrupt-map-mask = <0 0 0 7>;
1053 interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
1062 reset-gpios = <&pinctrl_ap 153 GPIO_ACTIVE_LOW>;
1064 #address-cells = <3>;
1065 #size-cells = <2>;
1068 interrupt-controller;
1069 #interrupt-cells = <1>;
1071 interrupt-map-mask = <0 0 0 7>;
1072 interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
1082 reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>;
1084 #address-cells = <3>;
1085 #size-cells = <2>;
1088 interrupt-controller;
1089 #interrupt-cells = <1>;
1091 interrupt-map-mask = <0 0 0 7>;
1092 interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
1102 #include "t8103-pmgr.dtsi"