Lines Matching +full:0 +full:x9b600000
3 * Devices used on die 0 on the Apple T6002 "M1 Ultra" SoC and present on
12 reg = <0x2 0x8e03c000 0x0 0x14000>;
21 reg = <0x2 0x8e100000 0x0 0xc000>,
22 <0x2 0x8e10c000 0x0 0x4>;
29 reg = <0x2 0x90820000 0x0 0x4000>;
33 gpio-ranges = <&pinctrl_smc 0 0 30>;
39 interrupts = <AIC_IRQ 0 743 IRQ_TYPE_LEVEL_HIGH>,
40 <AIC_IRQ 0 744 IRQ_TYPE_LEVEL_HIGH>,
41 <AIC_IRQ 0 745 IRQ_TYPE_LEVEL_HIGH>,
42 <AIC_IRQ 0 746 IRQ_TYPE_LEVEL_HIGH>,
43 <AIC_IRQ 0 747 IRQ_TYPE_LEVEL_HIGH>,
44 <AIC_IRQ 0 748 IRQ_TYPE_LEVEL_HIGH>,
45 <AIC_IRQ 0 749 IRQ_TYPE_LEVEL_HIGH>;
50 reg = <0x2 0x922b0000 0x0 0x4000>;
53 interrupts = <AIC_IRQ 0 631 IRQ_TYPE_LEVEL_HIGH>;
58 reg = <0x3 0x9b004000 0x0 0x4000>;
60 interrupts = <AIC_IRQ 0 1130 IRQ_TYPE_LEVEL_HIGH>;
67 reg = <0x3 0x9b008000 0x0 0x8000>;
69 interrupts = <AIC_IRQ 0 1130 IRQ_TYPE_LEVEL_HIGH>;
76 reg = <0x3 0x9b030000 0x0 0x4000>;
85 reg = <0x3 0x9b040000 0x0 0x4000>;
88 interrupts = <AIC_IRQ 0 1119 IRQ_TYPE_LEVEL_HIGH>;
89 pinctrl-0 = <&i2c0_pins>;
92 #address-cells = <0x1>;
93 #size-cells = <0x0>;
98 reg = <0x3 0x9b044000 0x0 0x4000>;
101 interrupts = <AIC_IRQ 0 1120 IRQ_TYPE_LEVEL_HIGH>;
102 pinctrl-0 = <&i2c1_pins>;
105 #address-cells = <0x1>;
106 #size-cells = <0x0>;
112 reg = <0x3 0x9b048000 0x0 0x4000>;
115 interrupts = <AIC_IRQ 0 1121 IRQ_TYPE_LEVEL_HIGH>;
116 pinctrl-0 = <&i2c2_pins>;
119 #address-cells = <0x1>;
120 #size-cells = <0x0>;
126 reg = <0x3 0x9b04c000 0x0 0x4000>;
129 interrupts = <AIC_IRQ 0 1122 IRQ_TYPE_LEVEL_HIGH>;
130 pinctrl-0 = <&i2c3_pins>;
133 #address-cells = <0x1>;
134 #size-cells = <0x0>;
140 reg = <0x3 0x9b050000 0x0 0x4000>;
143 interrupts = <AIC_IRQ 0 1123 IRQ_TYPE_LEVEL_HIGH>;
144 pinctrl-0 = <&i2c4_pins>;
147 #address-cells = <0x1>;
148 #size-cells = <0x0>;
154 reg = <0x3 0x9b054000 0x0 0x4000>;
157 interrupts = <AIC_IRQ 0 1124 IRQ_TYPE_LEVEL_HIGH>;
158 pinctrl-0 = <&i2c5_pins>;
161 #address-cells = <0x1>;
162 #size-cells = <0x0>;
168 reg = <0x3 0x9b200000 0x0 0x1000>;
171 interrupts = <AIC_IRQ 0 1097 IRQ_TYPE_LEVEL_HIGH>;
184 reg = <0x3 0x9b400000 0x0 0x34000>;
187 interrupts-extended = <0>,
188 <&aic AIC_IRQ 0 1118 IRQ_TYPE_LEVEL_HIGH>,
189 <0>,
190 <0>;
198 reg = <0x3 0x9b600000 0x0 0x10000>,
199 <0x3 0x9b500000 0x0 0x20000>;
200 clocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>;
201 dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>,
210 interrupts = <AIC_IRQ 0 1112 IRQ_TYPE_LEVEL_HIGH>,
211 <AIC_IRQ 0 1113 IRQ_TYPE_LEVEL_HIGH>,
212 <AIC_IRQ 0 1114 IRQ_TYPE_LEVEL_HIGH>,
213 <AIC_IRQ 0 1115 IRQ_TYPE_LEVEL_HIGH>;
222 reg = <0x5 0x81008000 0x0 0x4000>;
225 interrupts = <AIC_IRQ 0 1271 IRQ_TYPE_LEVEL_HIGH>;
231 reg = <0x5 0x82008000 0x0 0x4000>;
234 interrupts = <AIC_IRQ 0 1274 IRQ_TYPE_LEVEL_HIGH>;
240 reg = <0x5 0x83008000 0x0 0x4000>;
243 interrupts = <AIC_IRQ 0 1277 IRQ_TYPE_LEVEL_HIGH>;
250 reg = <0x5 0x84008000 0x0 0x4000>;
253 interrupts = <AIC_IRQ 0 1280 IRQ_TYPE_LEVEL_HIGH>;
262 reg = <0x5 0x90000000 0x0 0x1000000>,
263 <0x5 0x80000000 0x0 0x100000>,
264 <0x5 0x81000000 0x0 0x4000>,
265 <0x5 0x82000000 0x0 0x4000>,
266 <0x5 0x83000000 0x0 0x4000>,
267 <0x5 0x84000000 0x0 0x4000>;
271 interrupts = <AIC_IRQ 0 1270 IRQ_TYPE_LEVEL_HIGH>,
272 <AIC_IRQ 0 1273 IRQ_TYPE_LEVEL_HIGH>,
273 <AIC_IRQ 0 1276 IRQ_TYPE_LEVEL_HIGH>,
274 <AIC_IRQ 0 1279 IRQ_TYPE_LEVEL_HIGH>;
278 msi-ranges = <&aic AIC_IRQ 0 1581 IRQ_TYPE_EDGE_RISING 32>;
281 iommu-map = <0x100 &pcie0_dart_0 1 1>,
282 <0x200 &pcie0_dart_1 1 1>,
283 <0x300 &pcie0_dart_2 1 1>,
284 <0x400 &pcie0_dart_3 1 1>;
285 iommu-map-mask = <0xff00>;
287 bus-range = <0 4>;
290 ranges = <0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000>,
291 <0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000>;
294 pinctrl-0 = <&pcie_pins>;
297 port00: pci@0,0 {
299 reg = <0x0 0x0 0x0 0x0 0x0>;
309 interrupt-map-mask = <0 0 0 7>;
310 interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
311 <0 0 0 2 &port00 0 0 0 1>,
312 <0 0 0 3 &port00 0 0 0 2>,
313 <0 0 0 4 &port00 0 0 0 3>;
316 port01: pci@1,0 {
318 reg = <0x800 0x0 0x0 0x0 0x0>;
328 interrupt-map-mask = <0 0 0 7>;
329 interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
330 <0 0 0 2 &port01 0 0 0 1>,
331 <0 0 0 3 &port01 0 0 0 2>,
332 <0 0 0 4 &port01 0 0 0 3>;
335 port02: pci@2,0 {
337 reg = <0x1000 0x0 0x0 0x0 0x0>;
347 interrupt-map-mask = <0 0 0 7>;
348 interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
349 <0 0 0 2 &port02 0 0 0 1>,
350 <0 0 0 3 &port02 0 0 0 2>,
351 <0 0 0 4 &port02 0 0 0 3>;
355 port03: pci@3,0 {
357 reg = <0x1800 0x0 0x0 0x0 0x0>;
367 interrupt-map-mask = <0 0 0 7>;
368 interrupt-map = <0 0 0 1 &port03 0 0 0 0>,
369 <0 0 0 2 &port03 0 0 0 1>,
370 <0 0 0 3 &port03 0 0 0 2>,
371 <0 0 0 4 &port03 0 0 0 3>;