Lines Matching +full:0 +full:x43000000
3 * Devices used on die 0 on the Apple T6002 "M1 Ultra" SoC and present on
12 reg = <0x2 0x8e03c000 0x0 0x14000>;
21 reg = <0x2 0x8e100000 0x0 0xc000>,
22 <0x2 0x8e10c000 0x0 0x4>;
29 reg = <0x2 0x90820000 0x0 0x4000>;
33 gpio-ranges = <&pinctrl_smc 0 0 30>;
39 interrupts = <AIC_IRQ 0 743 IRQ_TYPE_LEVEL_HIGH>,
40 <AIC_IRQ 0 744 IRQ_TYPE_LEVEL_HIGH>,
41 <AIC_IRQ 0 745 IRQ_TYPE_LEVEL_HIGH>,
42 <AIC_IRQ 0 746 IRQ_TYPE_LEVEL_HIGH>,
43 <AIC_IRQ 0 747 IRQ_TYPE_LEVEL_HIGH>,
44 <AIC_IRQ 0 748 IRQ_TYPE_LEVEL_HIGH>,
45 <AIC_IRQ 0 749 IRQ_TYPE_LEVEL_HIGH>;
50 reg = <0x2 0x920a1300 0x0 0x100>;
52 #size-cells = <0>;
56 reg = <0xf SPMI_USID>;
64 reg = <0x1405 0x1>;
68 reg = <0x1411 0x6>;
72 reg = <0x6001 0x1>;
75 boot_error_count: boot-error-count@6002,0 {
76 reg = <0x6002 0x1>;
77 bits = <0 4>;
81 reg = <0x6002 0x1>;
86 reg = <0x6003 0x1>;
90 reg = <0x600f 0x1>;
95 reg = <0x867b 0x10>;
99 reg = <0x8b00 0x400>;
107 reg = <0x2 0x922b0000 0x0 0x4000>;
110 interrupts = <AIC_IRQ 0 631 IRQ_TYPE_LEVEL_HIGH>;
115 reg = <0x3 0x9b004000 0x0 0x4000>;
117 interrupts = <AIC_IRQ 0 1130 IRQ_TYPE_LEVEL_HIGH>;
124 reg = <0x3 0x9b008000 0x0 0x8000>;
126 interrupts = <AIC_IRQ 0 1130 IRQ_TYPE_LEVEL_HIGH>;
133 reg = <0x3 0x9b030000 0x0 0x4000>;
142 reg = <0x3 0x9b040000 0x0 0x4000>;
145 interrupts = <AIC_IRQ 0 1119 IRQ_TYPE_LEVEL_HIGH>;
146 pinctrl-0 = <&i2c0_pins>;
149 #address-cells = <0x1>;
150 #size-cells = <0x0>;
155 reg = <0x3 0x9b044000 0x0 0x4000>;
158 interrupts = <AIC_IRQ 0 1120 IRQ_TYPE_LEVEL_HIGH>;
159 pinctrl-0 = <&i2c1_pins>;
162 #address-cells = <0x1>;
163 #size-cells = <0x0>;
169 reg = <0x3 0x9b048000 0x0 0x4000>;
172 interrupts = <AIC_IRQ 0 1121 IRQ_TYPE_LEVEL_HIGH>;
173 pinctrl-0 = <&i2c2_pins>;
176 #address-cells = <0x1>;
177 #size-cells = <0x0>;
183 reg = <0x3 0x9b04c000 0x0 0x4000>;
186 interrupts = <AIC_IRQ 0 1122 IRQ_TYPE_LEVEL_HIGH>;
187 pinctrl-0 = <&i2c3_pins>;
190 #address-cells = <0x1>;
191 #size-cells = <0x0>;
197 reg = <0x3 0x9b050000 0x0 0x4000>;
200 interrupts = <AIC_IRQ 0 1123 IRQ_TYPE_LEVEL_HIGH>;
201 pinctrl-0 = <&i2c4_pins>;
204 #address-cells = <0x1>;
205 #size-cells = <0x0>;
211 reg = <0x3 0x9b054000 0x0 0x4000>;
214 interrupts = <AIC_IRQ 0 1124 IRQ_TYPE_LEVEL_HIGH>;
215 pinctrl-0 = <&i2c5_pins>;
218 #address-cells = <0x1>;
219 #size-cells = <0x0>;
225 reg = <0x3 0x9b104000 0x0 0x4000>;
227 interrupts = <AIC_IRQ 0 1107 IRQ_TYPE_LEVEL_HIGH>;
229 #size-cells = <0>;
231 pinctrl-0 = <&spi1_pins>;
239 reg = <0x3 0x9b10c000 0x0 0x4000>;
241 interrupts = <AIC_IRQ 0 1109 IRQ_TYPE_LEVEL_HIGH>;
243 #size-cells = <0>;
245 pinctrl-0 = <&spi3_pins>;
253 reg = <0x3 0x9b200000 0x0 0x1000>;
256 interrupts = <AIC_IRQ 0 1097 IRQ_TYPE_LEVEL_HIGH>;
269 reg = <0x3 0x9b400000 0x0 0x34000>;
272 interrupts-extended = <0>,
273 <&aic AIC_IRQ 0 1118 IRQ_TYPE_LEVEL_HIGH>,
274 <0>,
275 <0>;
283 reg = <0x3 0x9b600000 0x0 0x10000>,
284 <0x3 0x9b500000 0x0 0x20000>;
285 clocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>;
286 dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>,
295 interrupts = <AIC_IRQ 0 1112 IRQ_TYPE_LEVEL_HIGH>,
296 <AIC_IRQ 0 1113 IRQ_TYPE_LEVEL_HIGH>,
297 <AIC_IRQ 0 1114 IRQ_TYPE_LEVEL_HIGH>,
298 <AIC_IRQ 0 1115 IRQ_TYPE_LEVEL_HIGH>;
307 reg = <0x4 0x6400000 0 0x40000>,
308 <0x4 0x4000000 0 0x1000000>;
317 apple,firmware-abi = <0 0 0>;
322 reg = <0x4 0x6408000 0x0 0x4000>;
324 interrupts = <AIC_IRQ 0 1059 IRQ_TYPE_LEVEL_HIGH>,
325 <AIC_IRQ 0 1060 IRQ_TYPE_LEVEL_HIGH>,
326 <AIC_IRQ 0 1061 IRQ_TYPE_LEVEL_HIGH>,
327 <AIC_IRQ 0 1062 IRQ_TYPE_LEVEL_HIGH>;
330 #mbox-cells = <0>;
335 reg = <0x5 0x81008000 0x0 0x4000>;
338 interrupts = <AIC_IRQ 0 1271 IRQ_TYPE_LEVEL_HIGH>;
344 reg = <0x5 0x82008000 0x0 0x4000>;
347 interrupts = <AIC_IRQ 0 1274 IRQ_TYPE_LEVEL_HIGH>;
353 reg = <0x5 0x83008000 0x0 0x4000>;
356 interrupts = <AIC_IRQ 0 1277 IRQ_TYPE_LEVEL_HIGH>;
363 reg = <0x5 0x84008000 0x0 0x4000>;
366 interrupts = <AIC_IRQ 0 1280 IRQ_TYPE_LEVEL_HIGH>;
375 reg = <0x5 0x90000000 0x0 0x1000000>,
376 <0x5 0x80000000 0x0 0x100000>,
377 <0x5 0x81000000 0x0 0x4000>,
378 <0x5 0x82000000 0x0 0x4000>,
379 <0x5 0x83000000 0x0 0x4000>,
380 <0x5 0x84000000 0x0 0x4000>;
384 interrupts = <AIC_IRQ 0 1270 IRQ_TYPE_LEVEL_HIGH>,
385 <AIC_IRQ 0 1273 IRQ_TYPE_LEVEL_HIGH>,
386 <AIC_IRQ 0 1276 IRQ_TYPE_LEVEL_HIGH>,
387 <AIC_IRQ 0 1279 IRQ_TYPE_LEVEL_HIGH>;
391 msi-ranges = <&aic AIC_IRQ 0 1581 IRQ_TYPE_EDGE_RISING 32>;
394 iommu-map = <0x100 &pcie0_dart_0 1 1>,
395 <0x200 &pcie0_dart_1 1 1>,
396 <0x300 &pcie0_dart_2 1 1>,
397 <0x400 &pcie0_dart_3 1 1>;
398 iommu-map-mask = <0xff00>;
400 bus-range = <0 4>;
403 ranges = <0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000>,
404 <0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000>;
407 pinctrl-0 = <&pcie_pins>;
410 port00: pci@0,0 {
412 reg = <0x0 0x0 0x0 0x0 0x0>;
422 interrupt-map-mask = <0 0 0 7>;
423 interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
424 <0 0 0 2 &port00 0 0 0 1>,
425 <0 0 0 3 &port00 0 0 0 2>,
426 <0 0 0 4 &port00 0 0 0 3>;
429 port01: pci@1,0 {
431 reg = <0x800 0x0 0x0 0x0 0x0>;
441 interrupt-map-mask = <0 0 0 7>;
442 interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
443 <0 0 0 2 &port01 0 0 0 1>,
444 <0 0 0 3 &port01 0 0 0 2>,
445 <0 0 0 4 &port01 0 0 0 3>;
448 port02: pci@2,0 {
450 reg = <0x1000 0x0 0x0 0x0 0x0>;
460 interrupt-map-mask = <0 0 0 7>;
461 interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
462 <0 0 0 2 &port02 0 0 0 1>,
463 <0 0 0 3 &port02 0 0 0 2>,
464 <0 0 0 4 &port02 0 0 0 3>;
468 port03: pci@3,0 {
470 reg = <0x1800 0x0 0x0 0x0 0x0>;
480 interrupt-map-mask = <0 0 0 7>;
481 interrupt-map = <0 0 0 1 &port03 0 0 0 0>,
482 <0 0 0 2 &port03 0 0 0 1>,
483 <0 0 0 3 &port03 0 0 0 2>,
484 <0 0 0 4 &port03 0 0 0 3>;