Lines Matching +full:clock +full:- +full:latency +full:- +full:ns
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
11 #address-cells = <2>;
12 #size-cells = <2>;
19 #address-cells = <2>;
20 #size-cells = <0>;
22 cpu-map {
67 enable-method = "spin-table";
68 cpu-release-addr = <0 0>; /* To be filled by loader */
69 next-level-cache = <&l2_cache_0>;
70 i-cache-size = <0x20000>;
71 d-cache-size = <0x10000>;
72 operating-points-v2 = <&icestorm_opp>;
73 capacity-dmips-mhz = <714>;
74 performance-domains = <&cpufreq_e>;
81 enable-method = "spin-table";
82 cpu-release-addr = <0 0>; /* To be filled by loader */
83 next-level-cache = <&l2_cache_0>;
84 i-cache-size = <0x20000>;
85 d-cache-size = <0x10000>;
86 operating-points-v2 = <&icestorm_opp>;
87 capacity-dmips-mhz = <714>;
88 performance-domains = <&cpufreq_e>;
95 enable-method = "spin-table";
96 cpu-release-addr = <0 0>; /* To be filled by loader */
97 next-level-cache = <&l2_cache_1>;
98 i-cache-size = <0x30000>;
99 d-cache-size = <0x20000>;
100 operating-points-v2 = <&firestorm_opp>;
101 capacity-dmips-mhz = <1024>;
102 performance-domains = <&cpufreq_p0>;
109 enable-method = "spin-table";
110 cpu-release-addr = <0 0>; /* To be filled by loader */
111 next-level-cache = <&l2_cache_1>;
112 i-cache-size = <0x30000>;
113 d-cache-size = <0x20000>;
114 operating-points-v2 = <&firestorm_opp>;
115 capacity-dmips-mhz = <1024>;
116 performance-domains = <&cpufreq_p0>;
123 enable-method = "spin-table";
124 cpu-release-addr = <0 0>; /* To be filled by loader */
125 next-level-cache = <&l2_cache_1>;
126 i-cache-size = <0x30000>;
127 d-cache-size = <0x20000>;
128 operating-points-v2 = <&firestorm_opp>;
129 capacity-dmips-mhz = <1024>;
130 performance-domains = <&cpufreq_p0>;
137 enable-method = "spin-table";
138 cpu-release-addr = <0 0>; /* To be filled by loader */
139 next-level-cache = <&l2_cache_1>;
140 i-cache-size = <0x30000>;
141 d-cache-size = <0x20000>;
142 operating-points-v2 = <&firestorm_opp>;
143 capacity-dmips-mhz = <1024>;
144 performance-domains = <&cpufreq_p0>;
151 enable-method = "spin-table";
152 cpu-release-addr = <0 0>; /* To be filled by loader */
153 next-level-cache = <&l2_cache_2>;
154 i-cache-size = <0x30000>;
155 d-cache-size = <0x20000>;
156 operating-points-v2 = <&firestorm_opp>;
157 capacity-dmips-mhz = <1024>;
158 performance-domains = <&cpufreq_p1>;
165 enable-method = "spin-table";
166 cpu-release-addr = <0 0>; /* To be filled by loader */
167 next-level-cache = <&l2_cache_2>;
168 i-cache-size = <0x30000>;
169 d-cache-size = <0x20000>;
170 operating-points-v2 = <&firestorm_opp>;
171 capacity-dmips-mhz = <1024>;
172 performance-domains = <&cpufreq_p1>;
179 enable-method = "spin-table";
180 cpu-release-addr = <0 0>; /* To be filled by loader */
181 next-level-cache = <&l2_cache_2>;
182 i-cache-size = <0x30000>;
183 d-cache-size = <0x20000>;
184 operating-points-v2 = <&firestorm_opp>;
185 capacity-dmips-mhz = <1024>;
186 performance-domains = <&cpufreq_p1>;
193 enable-method = "spin-table";
194 cpu-release-addr = <0 0>; /* To be filled by loader */
195 next-level-cache = <&l2_cache_2>;
196 i-cache-size = <0x30000>;
197 d-cache-size = <0x20000>;
198 operating-points-v2 = <&firestorm_opp>;
199 capacity-dmips-mhz = <1024>;
200 performance-domains = <&cpufreq_p1>;
203 l2_cache_0: l2-cache-0 {
205 cache-level = <2>;
206 cache-unified;
207 cache-size = <0x400000>;
210 l2_cache_1: l2-cache-1 {
212 cache-level = <2>;
213 cache-unified;
214 cache-size = <0xc00000>;
217 l2_cache_2: l2-cache-2 {
219 cache-level = <2>;
220 cache-unified;
221 cache-size = <0xc00000>;
225 icestorm_opp: opp-table-0 {
226 compatible = "operating-points-v2";
229 opp-hz = /bits/ 64 <600000000>;
230 opp-level = <1>;
231 clock-latency-ns = <7500>;
234 opp-hz = /bits/ 64 <972000000>;
235 opp-level = <2>;
236 clock-latency-ns = <23000>;
239 opp-hz = /bits/ 64 <1332000000>;
240 opp-level = <3>;
241 clock-latency-ns = <29000>;
244 opp-hz = /bits/ 64 <1704000000>;
245 opp-level = <4>;
246 clock-latency-ns = <40000>;
249 opp-hz = /bits/ 64 <2064000000>;
250 opp-level = <5>;
251 clock-latency-ns = <50000>;
255 firestorm_opp: opp-table-1 {
256 compatible = "operating-points-v2";
259 opp-hz = /bits/ 64 <600000000>;
260 opp-level = <1>;
261 clock-latency-ns = <8000>;
264 opp-hz = /bits/ 64 <828000000>;
265 opp-level = <2>;
266 clock-latency-ns = <18000>;
269 opp-hz = /bits/ 64 <1056000000>;
270 opp-level = <3>;
271 clock-latency-ns = <19000>;
274 opp-hz = /bits/ 64 <1296000000>;
275 opp-level = <4>;
276 clock-latency-ns = <23000>;
279 opp-hz = /bits/ 64 <1524000000>;
280 opp-level = <5>;
281 clock-latency-ns = <24000>;
284 opp-hz = /bits/ 64 <1752000000>;
285 opp-level = <6>;
286 clock-latency-ns = <28000>;
289 opp-hz = /bits/ 64 <1980000000>;
290 opp-level = <7>;
291 clock-latency-ns = <31000>;
294 opp-hz = /bits/ 64 <2208000000>;
295 opp-level = <8>;
296 clock-latency-ns = <45000>;
299 opp-hz = /bits/ 64 <2448000000>;
300 opp-level = <9>;
301 clock-latency-ns = <49000>;
304 opp-hz = /bits/ 64 <2676000000>;
305 opp-level = <10>;
306 clock-latency-ns = <53000>;
309 opp-hz = /bits/ 64 <2904000000>;
310 opp-level = <11>;
311 clock-latency-ns = <56000>;
314 opp-hz = /bits/ 64 <3036000000>;
315 opp-level = <12>;
316 clock-latency-ns = <56000>;
320 opp-hz = /bits/ 64 <3132000000>;
321 opp-level = <13>;
322 clock-latency-ns = <56000>;
323 turbo-mode;
326 opp-hz = /bits/ 64 <3168000000>;
327 opp-level = <14>;
328 clock-latency-ns = <56000>;
329 turbo-mode;
332 opp-hz = /bits/ 64 <3228000000>;
333 opp-level = <15>;
334 clock-latency-ns = <56000>;
335 turbo-mode;
340 pmu-e {
341 compatible = "apple,icestorm-pmu";
342 interrupt-parent = <&aic>;
346 pmu-p {
347 compatible = "apple,firestorm-pmu";
348 interrupt-parent = <&aic>;
353 compatible = "arm,armv8-timer";
354 interrupt-parent = <&aic>;
355 interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
362 clkref: clock-ref {
363 compatible = "fixed-clock";
364 #clock-cells = <0>;
365 clock-frequency = <24000000>;
366 clock-output-names = "clkref";
369 clk_200m: clock-200m {
370 compatible = "fixed-clock";
371 #clock-cells = <0>;
372 clock-frequency = <200000000>;
373 clock-output-names = "clk_200m";
377 * This is a fabulated representation of the input clock
378 * to NCO since we don't know the true clock tree.
380 nco_clkref: clock-ref-nco {
381 compatible = "fixed-clock";
382 #clock-cells = <0>;
383 clock-output-names = "nco_ref";
386 reserved-memory {
387 #address-cells = <2>;
388 #size-cells = <2>;
395 gpu_hw_cal_a: hw-cal-a {
399 gpu_hw_cal_b: hw-cal-b {
403 uat_handoff: uat-handoff {
407 uat_pagetables: uat-pagetables {
411 uat_ttbs: uat-ttbs {