Lines Matching +full:0 +full:x5a000
18 #size-cells = <0>;
20 cpu0: cpu@0 {
23 reg = <0x0 0x0>;
30 reg = <0x0 0x1>;
37 reg = <0x0 0x2>;
44 reg = <0x0 0x3>;
66 #clock-cells = <0>;
89 #address-cells = <0>;
91 reg = <0x0 0xfff01000 0 0x1000>,
92 <0x0 0xfff02000 0 0x2000>,
93 <0x0 0xfff04000 0 0x2000>,
94 <0x0 0xfff06000 0 0x2000>;
100 reg = <0x0 0xfe000000 0x0 0x480000>;
103 ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
105 clkc_periphs: clock-controller@0 {
107 reg = <0x0 0x0 0x0 0x49c>;
131 reg = <0x0 0x8000 0x0 0x1e8>;
139 reg = <0x0 0x2100 0x0 0x10>;
150 reg = <0x0 0x4000 0x0 0x004c>,
151 <0x0 0x40c0 0x0 0x0220>;
155 gpio-ranges = <&periphs_pinctrl 0 0 82>;
494 mux-0 {
592 reg = <0x0 0x4080 0x0 0x20>;
601 reg = <0x0 0x28000 0x0 0xa4>;
604 #size-cells = <0>;
611 ext_mdio: mdio@0 {
612 reg = <0>;
614 #size-cells = <0>;
620 #size-cells = <0>;
634 reg = <0x0 0x50000 0x0 0x44>;
640 #size-cells = <0>;
646 reg = <0x0 0x58000 0x0 0x24>;
655 reg = <0x0 0x5a000 0x0 0x24>;
664 reg = <0x0 0x5c000 0x0 0x24>;
673 reg = <0x0 0x5e000 0x0 0x24>;
682 reg = <0x0 0x60000 0x0 0x24>;
691 reg = <0x0 0x66000 0x0 0x20>;
695 #size-cells = <0>;
701 reg = <0x0 0x68000 0x0 0x20>;
705 #size-cells = <0>;
711 reg = <0x0 0x6a000 0x0 0x20>;
715 #size-cells = <0>;
721 reg = <0x0 0x6c000 0x0 0x20>;
725 #size-cells = <0>;
731 reg = <0x0 0x6e000 0x0 0x20>;
735 #size-cells = <0>;
741 reg = <0x0 0x8c800 0x0 0x100>, <0x0 0x8c000 0x0 0x4>;
753 reg = <0x0 0x7a000 0x0 0x18>;
762 reg = <0x0 0x2000 0x0 0x98>;
770 reg = <0x0 0x10220 0x0 0x140>;
776 reg = <0x0 0x84040 0x0 0x30>;
783 reg = <0x0 0x440788 0x0 0x0c>;
791 reg = <0x0 0xfdc00000 0x0 0x10000>,
792 <0x0 0xfe024000 0x0 0x8>;
807 #size-cells = <0>;
814 reg = <0x0 0xfe088000 0x0 0x800>;
828 reg = <0x0 0xfe08a000 0x0 0x800>;
840 reg = <0x0 0xfe08c000 0x0 0x800>;