Lines Matching full:clkc

8 #include <dt-bindings/clock/gxbb-clkc.h>
25 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
38 				clocks = <&clkc CLKID_USB1>;
62 			clocks = <&clkc CLKID_ACODEC>;
73 			clocks = <&clkc CLKID_BLKMV>;
82 	clocks = <&clkc CLKID_AIU_GLUE>,
83 		 <&clkc CLKID_I2S_OUT>,
84 		 <&clkc CLKID_AOCLK_GATE>,
85 		 <&clkc CLKID_CTS_AMCLK>,
86 		 <&clkc CLKID_MIXER_IFACE>,
87 		 <&clkc CLKID_IEC958>,
88 		 <&clkc CLKID_IEC958_GATE>,
89 		 <&clkc CLKID_CTS_MCLK_I958>,
90 		 <&clkc CLKID_CTS_I958>;
108 		clocks = <&clkc CLKID_USB>;
119 		clocks = <&clkc CLKID_USB>;
128 	clocks = <&clkc CLKID_EFUSE>;
132 	clocks = <&clkc CLKID_ETH>,
133 		 <&clkc CLKID_FCLK_DIV2>,
134 		 <&clkc CLKID_MPLL2>,
135 		 <&clkc CLKID_FCLK_DIV2>;
310 	clocks = <&xtal>, <&clkc CLKID_CLK81>;
326 	clocks = <&clkc CLKID_HDMI>,
327 		 <&clkc CLKID_HDMI_PCLK>,
328 		 <&clkc CLKID_GCLK_VENCI_INT0>;
332 	assigned-clocks = <&clkc CLKID_HDMI_SEL>,
333 			  <&clkc CLKID_HDMI>;
339 	clkc: clock-controller {  label
340 		compatible = "amlogic,gxl-clkc";
348 	clocks = <&clkc CLKID_RNG0>;
353 	clocks = <&clkc CLKID_I2C>;
357 	clocks = <&clkc CLKID_AO_I2C>;
361 	clocks = <&clkc CLKID_I2C>;
365 	clocks = <&clkc CLKID_I2C>;
787 		clocks = <&clkc CLKID_FCLK_DIV4>;
815 		 <&clkc CLKID_FCLK_DIV4>,
816 		 <&clkc CLKID_FCLK_DIV3>;
820 	clocks = <&xtal>, <&clkc CLKID_CLK81>;
826 		 <&clkc CLKID_FCLK_DIV4>,
827 		 <&clkc CLKID_FCLK_DIV3>;
833 		 <&clkc CLKID_FCLK_DIV4>,
834 		 <&clkc CLKID_FCLK_DIV3>;
853 	clocks = <&clkc CLKID_VPU>,
854 	         <&clkc CLKID_VAPB>;
862 	assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
863 			  <&clkc CLKID_VPU_0>,
864 			  <&clkc CLKID_VPU>, /* Glitch free mux */
865 			  <&clkc CLKID_VAPB_0_SEL>,
866 			  <&clkc CLKID_VAPB_0>,
867 			  <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
868 	assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
870 				 <&clkc CLKID_VPU_0>,
871 				 <&clkc CLKID_FCLK_DIV4>,
873 				 <&clkc CLKID_VAPB_0>;
885 		 <&clkc CLKID_SAR_ADC>,
886 		 <&clkc CLKID_SAR_ADC_CLK>,
887 		 <&clkc CLKID_SAR_ADC_SEL>;
892 	clocks = <&clkc CLKID_SD_EMMC_A>,
893 		 <&clkc CLKID_SD_EMMC_A_CLK0>,
894 		 <&clkc CLKID_FCLK_DIV2>;
900 	clocks = <&clkc CLKID_SD_EMMC_B>,
901 		 <&clkc CLKID_SD_EMMC_B_CLK0>,
902 		 <&clkc CLKID_FCLK_DIV2>;
908 	clocks = <&clkc CLKID_SD_EMMC_C>,
909 		 <&clkc CLKID_SD_EMMC_C_CLK0>,
910 		 <&clkc CLKID_FCLK_DIV2>;
916 	clocks = <&clkc CLKID_HDMI_PCLK>,
917 		 <&clkc CLKID_CLK81>,
918 		 <&clkc CLKID_GCLK_VENCI_INT0>;
922 	clocks = <&clkc CLKID_SPICC>;
929 	clocks = <&clkc CLKID_SPI>;
933 	clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
948 	clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
953 	clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
964 	clocks = <&clkc CLKID_DOS_PARSER>,
965 		 <&clkc CLKID_DOS>,
966 		 <&clkc CLKID_VDEC_1>,
967 		 <&clkc CLKID_VDEC_HEVC>;