Lines Matching +full:0 +full:xff400000
23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0 0x0>;
37 reg = <0x0 0x1>;
72 size = <0x0 0x800000>;
73 alignment = <0x0 0x400000>;
95 reg = <0x0 0xfd000400 0x0 0x290>;
98 #size-cells = <0>;
105 reg = <0x0 0xfe000000 0x0 0x1000000>;
108 ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>;
110 reset: reset-controller@0 {
112 reg = <0x0 0x0 0x0 0x8c>;
123 reg = <0x0 0x0400 0x0 0x003c>,
124 <0x0 0x0480 0x0 0x0118>;
128 gpio-ranges = <&periphs_pinctrl 0 0 62>;
290 reg = <0x0 0x0440 0x0 0x14>;
299 reg = <0 0x800 0 0x104>;
315 reg = <0x0 0x1400 0x0 0x20>;
318 #size-cells = <0>;
326 reg = <0x0 0x1c00 0x0 0x18>;
336 reg = <0x0 0x2000 0x0 0x18>;
346 reg = <0x0 0x2c00 0x0 0x48>;
362 reg = <0x0 0x5c00 0x0 0x20>;
365 #size-cells = <0>;
373 reg = <0x0 0x6800 0x0 0x20>;
376 #size-cells = <0>;
384 reg = <0x0 0x6c00 0x0 0x20>;
387 #size-cells = <0>;
396 reg = <0x0 0x4000 0x0 0x60>;
399 #phy-cells = <0>;
405 reg = <0x0 0x4c00 0x0 0x50>;
410 #thermal-sensor-cells = <0>;
416 reg = <0x0 0x5118 0x0 0x4>;
422 reg = <0x0 0x5a20 0x0 0x140>;
428 reg = <0 0x7c80 0 0x18c>;
437 reg = <0x0 0x10000 0x0 0x800>;
456 reg = <0x0 0xfe004400 0x0 0xa0>;
477 reg = <0x0 0xff400000 0x0 0x100000>;
481 snps,quirk-frame-length-adjustment = <0x20>;
487 reg = <0x0 0xff500000 0x0 0x40000>;
502 reg = <0x0 0xff901000 0x0 0x1000>,
503 <0x0 0xff902000 0x0 0x2000>,
504 <0x0 0xff904000 0x0 0x2000>,
505 <0x0 0xff906000 0x0 0x2000>;
510 #address-cells = <0>;
517 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
519 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
521 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
523 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
530 #clock-cells = <0>;