Lines Matching +full:gic +full:- +full:timer

4  * Antoine Tenart <antoine.tenart@free-electrons.com>
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
35 /dts-v1/;
37 #include <dt-bindings/interrupt-controller/arm-gic.h>
41 compatible = "al,alpine-v2";
42 interrupt-parent = <&gic>;
43 #address-cells = <2>;
44 #size-cells = <2>;
47 #address-cells = <2>;
48 #size-cells = <0>;
51 compatible = "arm,cortex-a57";
54 enable-method = "psci";
58 compatible = "arm,cortex-a57";
61 enable-method = "psci";
65 compatible = "arm,cortex-a57";
68 enable-method = "psci";
72 compatible = "arm,cortex-a57";
75 enable-method = "psci";
80 compatible = "arm,psci-0.2", "arm,psci";
88 compatible = "fixed-clock";
89 #clock-cells = <0>;
90 clock-frequency = <1000000>;
93 timer {
94 compatible = "arm,armv8-timer";
102 compatible = "arm,cortex-a57-pmu";
110 compatible = "simple-bus";
111 #address-cells = <2>;
112 #size-cells = <2>;
114 interrupt-parent = <&gic>;
117 gic: interrupt-controller@f0200000 { label
118 compatible = "arm,gic-v3";
119 reg = <0x0 0xf0200000 0x0 0x10000>, /* GIC Dist */
125 interrupt-controller;
126 #interrupt-cells = <3>;
130 compatible = "pci-host-ecam-generic";
132 #size-cells = <2>;
133 #address-cells = <3>;
134 #interrupt-cells = <1>;
136 interrupt-map-mask = <0xf800 0 0 7>;
138 interrupt-map = <0x4000 0 0 1 &gic 0 53 4>,
139 <0x4800 0 0 1 &gic 0 54 4>;
142 bus-range = <0x00 0x00>;
143 msi-parent = <&msix>;
147 compatible = "al,alpine-msix";
149 msi-controller;
150 al,msi-base-spi = <160>;
151 al,msi-num-spis = <160>;
154 io-fabric@fc000000 {
155 compatible = "simple-bus";
156 #address-cells = <1>;
157 #size-cells = <1>;
164 clock-frequency = <500000000>;
165 reg-shift = <2>;
166 reg-io-width = <4>;
174 clock-frequency = <500000000>;
175 reg-shift = <2>;
176 reg-io-width = <4>;
184 clock-frequency = <500000000>;
185 reg-shift = <2>;
186 reg-io-width = <4>;
194 clock-frequency = <500000000>;
195 reg-shift = <2>;
196 reg-io-width = <4>;
200 timer0: timer@1890000 {
207 timer1: timer@1891000 {
215 timer2: timer@1892000 {
223 timer3: timer@1893000 {