Lines Matching +full:usb +full:- +full:uart +full:- +full:tx
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-h616-ccu.h>
8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
9 #include <dt-bindings/clock/sun6i-rtc.h>
10 #include <dt-bindings/reset/sun50i-h616-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "arm,cortex-a53";
27 enable-method = "psci";
29 #cooling-cells = <2>;
30 i-cache-size = <0x8000>;
31 i-cache-line-size = <64>;
32 i-cache-sets = <256>;
33 d-cache-size = <0x8000>;
34 d-cache-line-size = <64>;
35 d-cache-sets = <128>;
36 next-level-cache = <&l2_cache>;
40 compatible = "arm,cortex-a53";
43 enable-method = "psci";
45 #cooling-cells = <2>;
46 i-cache-size = <0x8000>;
47 i-cache-line-size = <64>;
48 i-cache-sets = <256>;
49 d-cache-size = <0x8000>;
50 d-cache-line-size = <64>;
51 d-cache-sets = <128>;
52 next-level-cache = <&l2_cache>;
56 compatible = "arm,cortex-a53";
59 enable-method = "psci";
61 #cooling-cells = <2>;
62 i-cache-size = <0x8000>;
63 i-cache-line-size = <64>;
64 i-cache-sets = <256>;
65 d-cache-size = <0x8000>;
66 d-cache-line-size = <64>;
67 d-cache-sets = <128>;
68 next-level-cache = <&l2_cache>;
72 compatible = "arm,cortex-a53";
75 enable-method = "psci";
77 #cooling-cells = <2>;
78 i-cache-size = <0x8000>;
79 i-cache-line-size = <64>;
80 i-cache-sets = <256>;
81 d-cache-size = <0x8000>;
82 d-cache-line-size = <64>;
83 d-cache-sets = <128>;
84 next-level-cache = <&l2_cache>;
87 l2_cache: l2-cache {
89 cache-level = <2>;
90 cache-unified;
91 cache-size = <0x40000>;
92 cache-line-size = <64>;
93 cache-sets = <256>;
97 reserved-memory {
98 #address-cells = <2>;
99 #size-cells = <2>;
103 * 256 KiB reserved for Trusted Firmware-A (BL31).
109 no-map;
113 osc24M: osc24M-clk {
114 #clock-cells = <0>;
115 compatible = "fixed-clock";
116 clock-frequency = <24000000>;
117 clock-output-names = "osc24M";
121 compatible = "arm,cortex-a53-pmu";
126 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
130 compatible = "arm,psci-0.2";
135 compatible = "arm,armv8-timer";
136 arm,no-tick-in-suspend;
148 compatible = "simple-bus";
149 #address-cells = <1>;
150 #size-cells = <1>;
154 compatible = "allwinner,sun50i-h616-mali",
155 "arm,mali-bifrost";
160 interrupt-names = "job", "mmu", "gpu";
162 clock-names = "core", "bus";
163 power-domains = <&prcm_ppu 2>;
169 compatible = "allwinner,sun50i-h616-crypto";
174 clock-names = "bus", "mod", "ram", "trng";
179 compatible = "allwinner,sun50i-h616-system-control";
181 #address-cells = <1>;
182 #size-cells = <1>;
186 compatible = "mmio-sram";
188 #address-cells = <1>;
189 #size-cells = <1>;
195 compatible = "allwinner,sun50i-h616-ccu";
198 clock-names = "hosc", "losc", "iosc";
199 #clock-cells = <1>;
200 #reset-cells = <1>;
203 dma: dma-controller@3002000 {
204 compatible = "allwinner,sun50i-h616-dma",
205 "allwinner,sun50i-a100-dma";
209 clock-names = "bus", "mbus";
210 dma-channels = <16>;
211 dma-requests = <49>;
213 #dma-cells = <1>;
217 compatible = "allwinner,sun50i-h616-sid", "allwinner,sun50i-a64-sid";
219 #address-cells = <1>;
220 #size-cells = <1>;
222 ths_calibration: thermal-sensor-calibration@14 {
226 cpu_speed_grade: cpu-speed-grade@0 {
232 compatible = "allwinner,sun50i-h616-wdt",
233 "allwinner,sun6i-a31-wdt";
240 compatible = "allwinner,sun50i-h616-pinctrl";
251 clock-names = "apb", "hosc", "losc";
252 gpio-controller;
253 #gpio-cells = <3>;
254 interrupt-controller;
255 #interrupt-cells = <3>;
257 ext_rgmii_pins: rgmii-pins {
263 drive-strength = <40>;
266 i2c0_pins: i2c0-pins {
271 i2c3_ph_pins: i2c3-ph-pins {
276 ir_rx_pin: ir-rx-pin {
281 mmc0_pins: mmc0-pins {
285 drive-strength = <30>;
286 bias-pull-up;
289 /omit-if-no-ref/
290 mmc1_pins: mmc1-pins {
294 drive-strength = <30>;
295 bias-pull-up;
298 mmc2_pins: mmc2-pins {
303 drive-strength = <30>;
304 bias-pull-up;
307 /omit-if-no-ref/
308 spi0_pins: spi0-pins {
313 /omit-if-no-ref/
314 spi0_cs0_pin: spi0-cs0-pin {
319 /omit-if-no-ref/
320 spi1_pins: spi1-pins {
325 /omit-if-no-ref/
326 spi1_cs0_pin: spi1-cs0-pin {
331 spdif_tx_pin: spdif-tx-pin {
336 uart0_ph_pins: uart0-ph-pins {
341 /omit-if-no-ref/
342 uart1_pins: uart1-pins {
347 /omit-if-no-ref/
348 uart1_rts_cts_pins: uart1-rts-cts-pins {
353 /omit-if-no-ref/
354 x32clk_fanout_pin: x32clk-fanout-pin {
360 gic: interrupt-controller@3021000 {
361 compatible = "arm,gic-400";
367 interrupt-controller;
368 #interrupt-cells = <3>;
372 compatible = "allwinner,sun50i-h616-iommu";
377 #iommu-cells = <1>;
381 compatible = "allwinner,sun50i-h616-mmc",
382 "allwinner,sun50i-a100-mmc";
385 clock-names = "ahb", "mmc";
387 reset-names = "ahb";
389 pinctrl-names = "default";
390 pinctrl-0 = <&mmc0_pins>;
392 max-frequency = <150000000>;
393 cap-sd-highspeed;
394 cap-mmc-highspeed;
395 mmc-ddr-3_3v;
396 cap-sdio-irq;
397 #address-cells = <1>;
398 #size-cells = <0>;
402 compatible = "allwinner,sun50i-h616-mmc",
403 "allwinner,sun50i-a100-mmc";
406 clock-names = "ahb", "mmc";
408 reset-names = "ahb";
410 pinctrl-names = "default";
411 pinctrl-0 = <&mmc1_pins>;
413 max-frequency = <150000000>;
414 cap-sd-highspeed;
415 cap-mmc-highspeed;
416 mmc-ddr-3_3v;
417 cap-sdio-irq;
418 #address-cells = <1>;
419 #size-cells = <0>;
423 compatible = "allwinner,sun50i-h616-emmc",
424 "allwinner,sun50i-a100-emmc";
427 clock-names = "ahb", "mmc";
429 reset-names = "ahb";
431 pinctrl-names = "default";
432 pinctrl-0 = <&mmc2_pins>;
434 max-frequency = <150000000>;
435 cap-sd-highspeed;
436 cap-mmc-highspeed;
437 mmc-ddr-3_3v;
438 cap-sdio-irq;
439 #address-cells = <1>;
440 #size-cells = <0>;
444 compatible = "snps,dw-apb-uart";
447 reg-shift = <2>;
448 reg-io-width = <4>;
451 dma-names = "tx", "rx";
457 compatible = "snps,dw-apb-uart";
460 reg-shift = <2>;
461 reg-io-width = <4>;
464 dma-names = "tx", "rx";
470 compatible = "snps,dw-apb-uart";
473 reg-shift = <2>;
474 reg-io-width = <4>;
477 dma-names = "tx", "rx";
483 compatible = "snps,dw-apb-uart";
486 reg-shift = <2>;
487 reg-io-width = <4>;
490 dma-names = "tx", "rx";
496 compatible = "snps,dw-apb-uart";
499 reg-shift = <2>;
500 reg-io-width = <4>;
503 dma-names = "tx", "rx";
509 compatible = "snps,dw-apb-uart";
512 reg-shift = <2>;
513 reg-io-width = <4>;
516 dma-names = "tx", "rx";
522 compatible = "allwinner,sun50i-h616-i2c",
523 "allwinner,sun8i-v536-i2c",
524 "allwinner,sun6i-a31-i2c";
529 dma-names = "rx", "tx";
531 pinctrl-names = "default";
532 pinctrl-0 = <&i2c0_pins>;
534 #address-cells = <1>;
535 #size-cells = <0>;
539 compatible = "allwinner,sun50i-h616-i2c",
540 "allwinner,sun8i-v536-i2c",
541 "allwinner,sun6i-a31-i2c";
546 dma-names = "rx", "tx";
549 #address-cells = <1>;
550 #size-cells = <0>;
554 compatible = "allwinner,sun50i-h616-i2c",
555 "allwinner,sun8i-v536-i2c",
556 "allwinner,sun6i-a31-i2c";
561 dma-names = "rx", "tx";
564 #address-cells = <1>;
565 #size-cells = <0>;
569 compatible = "allwinner,sun50i-h616-i2c",
570 "allwinner,sun8i-v536-i2c",
571 "allwinner,sun6i-a31-i2c";
576 dma-names = "rx", "tx";
579 #address-cells = <1>;
580 #size-cells = <0>;
584 compatible = "allwinner,sun50i-h616-i2c",
585 "allwinner,sun8i-v536-i2c",
586 "allwinner,sun6i-a31-i2c";
591 dma-names = "rx", "tx";
594 #address-cells = <1>;
595 #size-cells = <0>;
599 compatible = "allwinner,sun50i-h616-spi",
600 "allwinner,sun8i-h3-spi";
604 clock-names = "ahb", "mod";
606 dma-names = "rx", "tx";
609 #address-cells = <1>;
610 #size-cells = <0>;
614 compatible = "allwinner,sun50i-h616-spi",
615 "allwinner,sun8i-h3-spi";
619 clock-names = "ahb", "mod";
621 dma-names = "rx", "tx";
624 #address-cells = <1>;
625 #size-cells = <0>;
629 compatible = "allwinner,sun50i-h616-emac0",
630 "allwinner,sun50i-a64-emac";
633 interrupt-names = "macirq";
635 clock-names = "stmmaceth";
637 reset-names = "stmmaceth";
642 compatible = "snps,dwmac-mdio";
643 #address-cells = <1>;
644 #size-cells = <0>;
649 compatible = "allwinner,sun50i-h616-gpadc",
650 "allwinner,sun20i-d1-gpadc";
656 #io-channel-cells = <1>;
659 ths: thermal-sensor@5070400 {
660 compatible = "allwinner,sun50i-h616-ths";
664 clock-names = "bus";
666 nvmem-cells = <&ths_calibration>;
667 nvmem-cell-names = "calibration";
669 #thermal-sensor-cells = <1>;
673 compatible = "allwinner,sun50i-h616-lradc",
674 "allwinner,sun50i-r329-lradc";
683 compatible = "allwinner,sun50i-h616-spdif";
687 clock-names = "apb", "spdif";
690 dma-names = "tx";
691 pinctrl-names = "default";
692 pinctrl-0 = <&spdif_tx_pin>;
693 #sound-dai-cells = <0>;
698 #sound-dai-cells = <0>;
699 compatible = "allwinner,sun50i-h616-codec";
704 clock-names = "apb", "codec";
707 dma-names = "tx";
711 usbotg: usb@5100000 {
712 compatible = "allwinner,sun50i-h616-musb",
713 "allwinner,sun8i-h3-musb";
718 interrupt-names = "mc";
720 phy-names = "usb";
726 compatible = "allwinner,sun50i-h616-usb-phy";
732 reg-names = "phy_ctrl",
742 clock-names = "usb0_phy",
751 reset-names = "usb0_reset",
756 #phy-cells = <1>;
759 ehci0: usb@5101000 {
760 compatible = "allwinner,sun50i-h616-ehci",
761 "generic-ehci";
770 phy-names = "usb";
774 ohci0: usb@5101400 {
775 compatible = "allwinner,sun50i-h616-ohci",
776 "generic-ohci";
783 phy-names = "usb";
787 ehci1: usb@5200000 {
788 compatible = "allwinner,sun50i-h616-ehci",
789 "generic-ehci";
798 phy-names = "usb";
802 ohci1: usb@5200400 {
803 compatible = "allwinner,sun50i-h616-ohci",
804 "generic-ohci";
811 phy-names = "usb";
815 ehci2: usb@5310000 {
816 compatible = "allwinner,sun50i-h616-ehci",
817 "generic-ehci";
826 phy-names = "usb";
830 ohci2: usb@5310400 {
831 compatible = "allwinner,sun50i-h616-ohci",
832 "generic-ohci";
839 phy-names = "usb";
843 ehci3: usb@5311000 {
844 compatible = "allwinner,sun50i-h616-ehci",
845 "generic-ehci";
854 phy-names = "usb";
858 ohci3: usb@5311400 {
859 compatible = "allwinner,sun50i-h616-ohci",
860 "generic-ohci";
867 phy-names = "usb";
872 compatible = "allwinner,sun50i-h616-rtc";
877 clock-names = "bus", "hosc",
878 "pll-32k";
879 #clock-cells = <1>;
883 compatible = "allwinner,sun50i-h616-r-ccu";
887 clock-names = "hosc", "losc", "iosc", "pll-periph";
888 #clock-cells = <1>;
889 #reset-cells = <1>;
892 prcm_ppu: power-controller@7010250 {
893 compatible = "allwinner,sun50i-h616-prcm-ppu";
895 #power-domain-cells = <1>;
898 nmi_intc: interrupt-controller@7010320 {
899 compatible = "allwinner,sun50i-h616-nmi",
900 "allwinner,sun9i-a80-nmi";
902 interrupt-controller;
903 #interrupt-cells = <2>;
908 compatible = "allwinner,sun50i-h616-r-pinctrl";
912 clock-names = "apb", "hosc", "losc";
913 gpio-controller;
914 #gpio-cells = <3>;
916 /omit-if-no-ref/
917 r_i2c_pins: r-i2c-pins {
922 r_rsb_pins: r-rsb-pins {
929 compatible = "allwinner,sun50i-h616-ir",
930 "allwinner,sun6i-a31-ir";
935 clock-names = "apb", "ir";
937 pinctrl-names = "default";
938 pinctrl-0 = <&ir_rx_pin>;
943 compatible = "allwinner,sun50i-h616-i2c",
944 "allwinner,sun8i-v536-i2c",
945 "allwinner,sun6i-a31-i2c";
950 dma-names = "rx", "tx";
952 pinctrl-names = "default";
953 pinctrl-0 = <&r_i2c_pins>;
955 #address-cells = <1>;
956 #size-cells = <0>;
960 compatible = "allwinner,sun50i-h616-rsb",
961 "allwinner,sun8i-a23-rsb";
965 clock-frequency = <3000000>;
967 pinctrl-names = "default";
968 pinctrl-0 = <&r_rsb_pins>;
970 #address-cells = <1>;
971 #size-cells = <0>;
975 thermal-zones {
976 cpu-thermal {
977 polling-delay-passive = <500>;
978 polling-delay = <1000>;
979 thermal-sensors = <&ths 2>;
980 sustainable-power = <1000>;
983 cpu_threshold: cpu-trip-0 {
988 cpu_target: cpu-trip-1 {
993 cpu_critical: cpu-trip-2 {
1001 gpu-thermal {
1002 polling-delay-passive = <500>;
1003 polling-delay = <1000>;
1004 thermal-sensors = <&ths 0>;
1005 sustainable-power = <1100>;
1008 gpu_temp_critical: gpu-trip-0 {
1016 ve-thermal {
1017 polling-delay-passive = <0>;
1018 polling-delay = <0>;
1019 thermal-sensors = <&ths 1>;
1022 ve_temp_critical: ve-trip-0 {
1030 ddr-thermal {
1031 polling-delay-passive = <0>;
1032 polling-delay = <0>;
1033 thermal-sensors = <&ths 3>;
1036 ddr_temp_critical: ddr-trip-0 {