Lines Matching +full:pmu +full:- +full:sram
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <arm/allwinner/sunxi-h3-h5.dtsi>
6 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <0>;
14 compatible = "arm,cortex-a53";
17 enable-method = "psci";
19 clock-latency-ns = <244144>; /* 8 32k periods */
20 #cooling-cells = <2>;
24 compatible = "arm,cortex-a53";
27 enable-method = "psci";
29 clock-latency-ns = <244144>; /* 8 32k periods */
30 #cooling-cells = <2>;
34 compatible = "arm,cortex-a53";
37 enable-method = "psci";
39 clock-latency-ns = <244144>; /* 8 32k periods */
40 #cooling-cells = <2>;
44 compatible = "arm,cortex-a53";
47 enable-method = "psci";
49 clock-latency-ns = <244144>; /* 8 32k periods */
50 #cooling-cells = <2>;
54 pmu {
55 compatible = "arm,cortex-a53-pmu";
60 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
64 compatible = "arm,psci-0.2";
69 compatible = "arm,armv8-timer";
70 arm,no-tick-in-suspend;
82 syscon: system-control@1c00000 {
83 compatible = "allwinner,sun50i-h5-system-control";
85 #address-cells = <1>;
86 #size-cells = <1>;
89 sram_c1: sram@18000 {
90 compatible = "mmio-sram";
92 #address-cells = <1>;
93 #size-cells = <1>;
96 ve_sram: sram-section@0 {
97 compatible = "allwinner,sun50i-h5-sram-c1",
98 "allwinner,sun4i-a10-sram-c1";
104 video-codec@1c0e000 {
105 compatible = "allwinner,sun50i-h5-video-engine";
109 clock-names = "ahb", "mod", "ram";
112 allwinner,sram = <&ve_sram 1>;
116 compatible = "allwinner,sun50i-h5-crypto";
120 clock-names = "bus", "mod";
125 compatible = "allwinner,sun8i-h3-deinterlace";
130 clock-names = "bus", "mod", "ram";
134 interconnect-names = "dma-mem";
138 compatible = "allwinner,sun50i-h5-mali", "arm,mali-450";
142 * PMU, the actual silicon does not have the PMU
157 interrupt-names = "gp",
169 clock-names = "bus", "core";
172 assigned-clocks = <&ccu CLK_GPU>;
173 assigned-clock-rates = <384000000>;
176 ths: thermal-sensor@1c25000 {
177 compatible = "allwinner,sun50i-h5-ths";
182 clock-names = "bus", "mod";
183 nvmem-cells = <&ths_calibration>;
184 nvmem-cell-names = "calibration";
185 #thermal-sensor-cells = <1>;
189 thermal-zones {
190 cpu_thermal: cpu-thermal {
191 polling-delay-passive = <0>;
192 polling-delay = <0>;
193 thermal-sensors = <&ths 0>;
196 cpu_hot_trip: cpu-hot {
202 cpu_very_hot_trip: cpu-very-hot {
209 cooling-maps {
210 cpu-hot-limit {
212 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
220 gpu-thermal {
221 polling-delay-passive = <0>;
222 polling-delay = <0>;
223 thermal-sensors = <&ths 1>;
229 compatible = "allwinner,sun50i-h5-ccu";
233 compatible = "allwinner,sun50i-h5-de2-clk";
237 compatible = "allwinner,sun50i-h5-mbus";
241 compatible = "allwinner,sun50i-h5-mmc",
242 "allwinner,sun50i-a64-mmc";
244 clock-names = "ahb", "mmc";
248 compatible = "allwinner,sun50i-h5-mmc",
249 "allwinner,sun50i-a64-mmc";
251 clock-names = "ahb", "mmc";
255 compatible = "allwinner,sun50i-h5-emmc",
256 "allwinner,sun50i-a64-emmc";
258 clock-names = "ahb", "mmc";
265 compatible = "allwinner,sun50i-h5-pinctrl";
269 compatible = "allwinner,sun50i-h5-rtc";
273 compatible = "allwinner,sun50i-h5-sid";