Lines Matching +full:0 +full:x01c0c000
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
57 i-cache-size = <0x8000>;
60 d-cache-size = <0x8000>;
74 i-cache-size = <0x8000>;
77 d-cache-size = <0x8000>;
91 i-cache-size = <0x8000>;
94 d-cache-size = <0x8000>;
108 i-cache-size = <0x8000>;
111 d-cache-size = <0x8000>;
121 cache-size = <0x80000>;
143 #clock-cells = <0>;
150 #clock-cells = <0>;
172 #size-cells = <0>;
183 simple-audio-card,dai-link@0 {
194 sound-dai = <&codec 0>;
216 polling-delay-passive = <0>;
217 polling-delay = <0>;
218 thermal-sensors = <&ths 0>;
263 polling-delay-passive = <0>;
264 polling-delay = <0>;
278 polling-delay-passive = <0>;
279 polling-delay = <0>;
300 reg = <0x1000000 0x400000>;
304 ranges = <0 0x1000000 0x400000>;
306 display_clocks: clock@0 {
308 reg = <0x0 0x10000>;
321 reg = <0x20000 0x10000>;
331 compatible = "allwinner,sun50i-a64-de2-mixer-0";
332 reg = <0x100000 0x100000>;
341 #size-cells = <0>;
345 #size-cells = <0>;
348 mixer0_out_tcon0: endpoint@0 {
349 reg = <0>;
363 reg = <0x200000 0x100000>;
372 #size-cells = <0>;
376 #size-cells = <0>;
379 mixer1_out_tcon0: endpoint@0 {
380 reg = <0>;
395 reg = <0x01c00000 0x1000>;
402 reg = <0x00018000 0x28000>;
405 ranges = <0 0x00018000 0x28000>;
407 de2_sram: sram-section@0 {
409 reg = <0x0000 0x28000>;
415 reg = <0x01d00000 0x40000>;
418 ranges = <0 0x01d00000 0x40000>;
420 ve_sram: sram-section@0 {
423 reg = <0x000000 0x40000>;
430 reg = <0x01c02000 0x1000>;
442 reg = <0x01c0c000 0x1000>;
447 #clock-cells = <0>;
453 #size-cells = <0>;
455 tcon0_in: port@0 {
457 #size-cells = <0>;
458 reg = <0>;
460 tcon0_in_mixer0: endpoint@0 {
461 reg = <0>;
473 #size-cells = <0>;
488 reg = <0x01c0d000 0x1000>;
497 #size-cells = <0>;
499 tcon1_in: port@0 {
501 #size-cells = <0>;
502 reg = <0>;
504 tcon1_in_mixer0: endpoint@0 {
505 reg = <0>;
517 #size-cells = <0>;
530 reg = <0x01c0e000 0x1000>;
541 reg = <0x01c0f000 0x1000>;
550 #size-cells = <0>;
555 reg = <0x01c10000 0x1000>;
564 #size-cells = <0>;
569 reg = <0x01c11000 0x1000>;
578 #size-cells = <0>;
583 reg = <0x1c14000 0x400>;
588 reg = <0x34 0x8>;
594 reg = <0x01c15000 0x1000>;
604 reg = <0x01c17000 0x1000>;
613 reg = <0x01c19000 0x0400>;
618 phys = <&usbphy 0>;
620 extcon = <&usbphy 0>;
627 reg = <0x01c19400 0x14>,
628 <0x01c1a800 0x4>,
629 <0x01c1b800 0x4>;
647 reg = <0x01c1a000 0x100>;
654 phys = <&usbphy 0>;
661 reg = <0x01c1a400 0x100>;
666 phys = <&usbphy 0>;
673 reg = <0x01c1b000 0x100>;
687 reg = <0x01c1b400 0x100>;
699 reg = <0x01c20000 0x400>;
708 reg = <0x01c20800 0x400>;
876 reg = <0x01c20c00 0xa0>;
885 reg = <0x01c20ca0 0x20>;
891 #sound-dai-cells = <0>;
894 reg = <0x01c21000 0x400>;
902 pinctrl-0 = <&spdif_tx_pin>;
909 reg = <0x01c21800 0x400>;
916 #sound-dai-cells = <0>;
919 reg = <0x01c22000 0x400>;
930 #sound-dai-cells = <0>;
933 reg = <0x01c22400 0x400>;
944 #sound-dai-cells = <0>;
947 reg = <0x01c22800 0x400>;
958 #sound-dai-cells = <0>;
960 reg = <0x01c22c00 0x200>;
974 reg = <0x01c22e00 0x600>;
983 reg = <0x01c25000 0x100>;
995 reg = <0x01c28000 0x400>;
996 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
1006 reg = <0x01c28400 0x400>;
1017 reg = <0x01c28800 0x400>;
1028 reg = <0x01c28c00 0x400>;
1039 reg = <0x01c29000 0x400>;
1050 reg = <0x01c2ac00 0x400>;
1055 pinctrl-0 = <&i2c0_pins>;
1058 #size-cells = <0>;
1063 reg = <0x01c2b000 0x400>;
1068 pinctrl-0 = <&i2c1_pins>;
1071 #size-cells = <0>;
1076 reg = <0x01c2b400 0x400>;
1081 pinctrl-0 = <&i2c2_pins>;
1084 #size-cells = <0>;
1089 reg = <0x01c68000 0x1000>;
1096 pinctrl-0 = <&spi0_pins>;
1101 #size-cells = <0>;
1106 reg = <0x01c69000 0x1000>;
1113 pinctrl-0 = <&spi1_pins>;
1118 #size-cells = <0>;
1124 reg = <0x01c30000 0x10000>;
1136 #size-cells = <0>;
1142 reg = <0x01c40000 0x10000>;
1165 reg = <0x01c81000 0x1000>,
1166 <0x01c82000 0x2000>,
1167 <0x01c84000 0x2000>,
1168 <0x01c86000 0x2000>;
1177 reg = <0x01c21400 0x400>;
1180 pinctrl-0 = <&pwm_pin>;
1187 reg = <0x01c62000 0x1000>,
1188 <0x01c63000 0x1000>;
1197 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
1203 reg = <0x01cb0000 0x1000>;
1211 pinctrl-0 = <&csi_pins>;
1217 reg = <0x01ca0000 0x1000>;
1225 #size-cells = <0>;
1237 reg = <0x01ca1000 0x1000>;
1244 #phy-cells = <0>;
1250 reg = <0x01e00000 0x20000>;
1264 reg = <0x01ee0000 0x10000>;
1278 #size-cells = <0>;
1280 hdmi_in: port@0 {
1281 reg = <0>;
1296 reg = <0x01ef0000 0x10000>;
1299 clock-names = "bus", "mod", "pll-0";
1302 #phy-cells = <0>;
1308 reg = <0x01f00000 0x400>;
1322 reg = <0x01f00c00 0x400>;
1328 reg = <0x01f01400 0x100>;
1338 reg = <0x01f015c0 0x4>;
1345 reg = <0x01f02400 0x400>;
1351 #size-cells = <0>;
1357 reg = <0x01f02000 0x400>;
1363 pinctrl-0 = <&r_ir_rx_pin>;
1370 reg = <0x01f03800 0x400>;
1373 pinctrl-0 = <&r_pwm_pin>;
1380 reg = <0x01f02c00 0x400>;
1413 reg = <0x01f03400 0x400>;
1419 pinctrl-0 = <&r_rsb_pins>;
1422 #size-cells = <0>;