Lines Matching +full:1 +full:c0
52 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
55 mcr p15, 0, r0, c1, c0, 0 @ disable caches
77 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
80 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
93 mrc p15, 0, r1, c1, c0, 0 @ Read control register
95 bic r2, r1, #1 << 12
99 mcr p15, 0, r2, c1, c0, 0 @ Disable I cache
100 mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
101 mcr p15, 0, r1, c1, c0, 0 @ Restore ICache enable
137 1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test,clean,invalidate
138 bne 1b
161 1: tst r2, #VM_EXEC
163 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
164 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
166 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
167 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
170 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
171 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
173 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
174 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
178 blo 1b
211 bic r0, r0, #CACHE_DLINESIZE - 1
212 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
213 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
216 blo 1b
233 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
236 blo 1b
258 tst r0, #CACHE_DLINESIZE - 1
259 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
260 tst r1, #CACHE_DLINESIZE - 1
261 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
263 bic r0, r0, #CACHE_DLINESIZE - 1
264 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
267 blo 1b
283 bic r0, r0, #CACHE_DLINESIZE - 1
284 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
287 blo 1b
301 bic r0, r0, #CACHE_DLINESIZE - 1
302 1:
304 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
306 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
310 blo 1b
341 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
344 bhi 1b
368 1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test,clean,invalidate
369 bne 1b
373 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
390 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
403 mrc p15, 0, r4, c13, c0, 0 @ PID
404 mrc p15, 0, r5, c3, c0, 0 @ Domain ID
405 mrc p15, 0, r6, c1, c0, 0 @ Control register
415 mcr p15, 0, r4, c13, c0, 0 @ PID
416 mcr p15, 0, r5, c3, c0, 0 @ Domain ID
417 mcr p15, 0, r1, c2, c0, 0 @ TTB address
435 mcr p15, 7, r0, c15, c0, 0
440 mrc p15, 0, r0, c1, c0 @ get control register v4
444 orr r0, r0, #0x4000 @ .1.. .... .... ....
462 define_processor_functions arm926, dabort=v5tj_early_abort, pabort=legacy_pabort, suspend=1