Lines Matching +full:max +full:- +full:rt
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/cache-v7m.S
5 * Based on linux/arch/arm/mm/cache-v7.S
20 #include "proc-macros.S"
22 .arch armv7-m
25 .macro v7m_cache_read, rt, reg
26 movw \rt, #:lower16:BASEADDR_V7M_SCB + \reg
27 movt \rt, #:upper16:BASEADDR_V7M_SCB + \reg
28 ldr \rt, [\rt]
31 .macro v7m_cacheop, rt, tmp, op, c = al
34 str\c \rt, [\tmp]
38 .macro read_ccsidr, rt argument
39 v7m_cache_read \rt, V7M_SCB_CCSIDR
42 .macro read_clidr, rt argument
43 v7m_cache_read \rt, V7M_SCB_CLIDR
46 .macro write_csselr, rt, tmp
47 v7m_cacheop \rt, \tmp, V7M_SCB_CSSELR
53 .macro dcisw, rt, tmp
54 v7m_cacheop \rt, \tmp, V7M_SCB_DCISW
60 .macro dccisw, rt, tmp
61 v7m_cacheop \rt, \tmp, V7M_SCB_DCCISW
68 .macro dccimvac\c, rt, tmp
69 v7m_cacheop \rt, \tmp, V7M_SCB_DCCIMVAC, \c
77 .macro dcimvac\c, rt, tmp
78 v7m_cacheop \rt, \tmp, V7M_SCB_DCIMVAC, \c
85 .macro dccmvau, rt, tmp
86 v7m_cacheop \rt, \tmp, V7M_SCB_DCCMVAU
92 .macro dccmvac, rt, tmp
93 v7m_cacheop \rt, \tmp, V7M_SCB_DCCMVAC
99 .macro icimvau, rt, tmp
100 v7m_cacheop \rt, \tmp, V7M_SCB_ICIMVAU
105 * rt data ignored by ICIALLU(IS), so can be used for the address
107 .macro invalidate_icache, rt argument
108 v7m_cacheop \rt, \rt, V7M_SCB_ICIALLU
109 mov \rt, #0
114 * rt data ignored by BPIALL, so it can be used for the address
116 .macro invalidate_bp, rt argument
117 v7m_cacheop \rt, \rt, V7M_SCB_BPIALL
118 mov \rt, #0
132 and r3, r1, r0, lsr #3 @ NumWays - 1
140 1: sub r2, r2, #1 @ NumSets--
142 2: subs r3, r3, #1 @ Temp--
158 * Flush the whole I-cache.
161 * r0 - set to 0
171 * Flush the whole D-cache.
173 * Corrupted registers: r0-r7, r9-r11
188 blt skip @ skip if no cache, or just i-cache
204 ands r7, r7, r1, lsr #13 @ extract max number of the index size
206 mov r9, r7 @ create working copy of max index
241 stmfd sp!, {r4-r7, r9-r11, lr}
244 ldmfd sp!, {r4-r7, r9-r11, lr}
253 * - mm - mm_struct describing address space
264 * - start - start address (may not be aligned)
265 * - end - end address (exclusive, may not be aligned)
266 * - flags - vm_area_struct flags describing address space
269 * - we have a VIPT cache.
282 * - start - virtual start address of region
283 * - end - virtual end address of region
286 * - the Icache does not read data from the write buffer
301 * - start - virtual start address of region
302 * - end - virtual end address of region
305 * - the Icache does not read data from the write buffer
343 * - addr - kernel address
344 * - size - region size
367 * - start - virtual start address of region
368 * - end - virtual end address of region
393 * - start - virtual start address of region
394 * - end - virtual end address of region
411 * - start - virtual start address of region
412 * - end - virtual end address of region
429 * - start - kernel virtual start address
430 * - size - size of region
431 * - dir - DMA direction
442 * - start - kernel virtual start address
443 * - size - size of region
444 * - dir - DMA direction