Lines Matching full:select
4 # Select CPU types depending on the architecture selected. This selects
12 select CPU_32v4T
13 select CPU_ABRT_LV4T
14 select CPU_CACHE_V4
15 select CPU_PABRT_LEGACY
26 select CPU_32v4T
27 select CPU_ABRT_LV4T
28 select CPU_CACHE_V4
29 select CPU_CACHE_VIVT
30 select CPU_COPY_V4WT if MMU
31 select CPU_CP15_MMU
32 select CPU_PABRT_LEGACY
33 select CPU_THUMB_CAPABLE
34 select CPU_TLB_V4WT if MMU
46 select CPU_32v4T
47 select CPU_ABRT_LV4T
48 select CPU_CACHE_V4
49 select CPU_CP15_MPU
50 select CPU_PABRT_LEGACY
51 select CPU_THUMB_CAPABLE
64 select CPU_32v4T
65 select CPU_ABRT_NOMMU
66 select CPU_CACHE_V4
67 select CPU_PABRT_LEGACY
78 select CPU_32v4T
79 select CPU_ABRT_EV4T
80 select CPU_CACHE_V4WT
81 select CPU_CACHE_VIVT
82 select CPU_COPY_V4WB if MMU
83 select CPU_CP15_MMU
84 select CPU_PABRT_LEGACY
85 select CPU_THUMB_CAPABLE
86 select CPU_TLB_V4WBI if MMU
97 select CPU_32v4T
98 select CPU_ABRT_EV4T
99 select CPU_CACHE_V4WT
100 select CPU_CACHE_VIVT
101 select CPU_COPY_V4WB if MMU
102 select CPU_CP15_MMU
103 select CPU_PABRT_LEGACY
104 select CPU_THUMB_CAPABLE
105 select CPU_TLB_V4WBI if MMU
117 select CPU_32v4T
118 select CPU_ABRT_EV4T
119 select CPU_CACHE_V4WT
120 select CPU_CACHE_VIVT
121 select CPU_COPY_V4WB if MMU
122 select CPU_CP15_MMU
123 select CPU_PABRT_LEGACY
124 select CPU_THUMB_CAPABLE
125 select CPU_TLB_V4WBI if MMU
137 select CPU_32v5
138 select CPU_ABRT_EV5TJ
139 select CPU_CACHE_VIVT
140 select CPU_COPY_V4WB if MMU
141 select CPU_CP15_MMU
142 select CPU_PABRT_LEGACY
143 select CPU_THUMB_CAPABLE
144 select CPU_TLB_V4WBI if MMU
156 select CPU_32v4
157 select CPU_ABRT_EV4
158 select CPU_CACHE_FA
159 select CPU_CACHE_VIVT
160 select CPU_COPY_FA if MMU
161 select CPU_CP15_MMU
162 select CPU_PABRT_LEGACY
163 select CPU_TLB_FA if MMU
175 select CPU_32v4T
176 select CPU_ABRT_NOMMU
177 select CPU_CACHE_VIVT
178 select CPU_CP15_MPU
179 select CPU_PABRT_LEGACY
180 select CPU_THUMB_CAPABLE
194 select CPU_32v5
195 select CPU_ABRT_NOMMU
196 select CPU_CACHE_VIVT
197 select CPU_CP15_MPU
198 select CPU_PABRT_LEGACY
199 select CPU_THUMB_CAPABLE
211 select CPU_32v5
212 select CPU_ABRT_EV4T
213 select CPU_CACHE_V4WT
214 select CPU_CACHE_VIVT
215 select CPU_COPY_V4WB if MMU
216 select CPU_CP15_MMU
217 select CPU_PABRT_LEGACY
218 select CPU_THUMB_CAPABLE
219 select CPU_TLB_V4WBI if MMU
231 select CPU_32v5
232 select CPU_ABRT_EV4T
233 select CPU_CACHE_V4WT
234 select CPU_CACHE_VIVT
235 select CPU_COPY_V4WB if MMU
236 select CPU_CP15_MMU
237 select CPU_PABRT_LEGACY
238 select CPU_THUMB_CAPABLE
239 select CPU_TLB_V4WBI if MMU
244 select CPU_32v5
245 select CPU_ABRT_EV4T
246 select CPU_CACHE_VIVT
247 select CPU_COPY_V4WB if MMU # can probably do better
248 select CPU_CP15_MMU
249 select CPU_PABRT_LEGACY
250 select CPU_THUMB_CAPABLE
251 select CPU_TLB_V4WBI if MMU
263 select CPU_32v5
264 select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10
265 select CPU_CACHE_VIVT
266 select CPU_COPY_V4WB if MMU # can probably do better
267 select CPU_CP15_MMU
268 select CPU_PABRT_LEGACY
269 select CPU_THUMB_CAPABLE
270 select CPU_TLB_V4WBI if MMU
281 select CPU_32v3 if ARCH_RPC
282 select CPU_32v4 if !ARCH_RPC
283 select CPU_ABRT_EV4
284 select CPU_CACHE_V4WB
285 select CPU_CACHE_VIVT
286 select CPU_COPY_V4WB if MMU
287 select CPU_CP15_MMU
288 select CPU_PABRT_LEGACY
289 select CPU_TLB_V4WB if MMU
302 select CPU_32v4
303 select CPU_ABRT_EV4
304 select CPU_CACHE_V4WB
305 select CPU_CACHE_VIVT
306 select CPU_CP15_MMU
307 select CPU_PABRT_LEGACY
308 select CPU_TLB_V4WB if MMU
313 select CPU_32v5
314 select CPU_ABRT_EV5T
315 select CPU_CACHE_VIVT
316 select CPU_CP15_MMU
317 select CPU_PABRT_LEGACY
318 select CPU_THUMB_CAPABLE
319 select CPU_TLB_V4WBI if MMU
324 select CPU_32v5
325 select CPU_ABRT_EV5T
326 select CPU_CACHE_VIVT
327 select CPU_CP15_MMU
328 select CPU_PABRT_LEGACY
329 select CPU_THUMB_CAPABLE
330 select CPU_TLB_V4WBI if MMU
331 select IO_36
336 select CPU_32v5
337 select CPU_ABRT_EV5T
338 select CPU_CACHE_VIVT
339 select CPU_COPY_V4WB if MMU
340 select CPU_CP15_MMU
341 select CPU_PABRT_LEGACY
342 select CPU_THUMB_CAPABLE
343 select CPU_TLB_V4WBI if MMU
348 select CPU_32v5
349 select CPU_ABRT_EV5T
350 select CPU_CACHE_VIVT
351 select CPU_COPY_FEROCEON if MMU
352 select CPU_CP15_MMU
353 select CPU_PABRT_LEGACY
354 select CPU_THUMB_CAPABLE
355 select CPU_TLB_FEROCEON if MMU
369 select ARM_THUMBEE
370 select CPU_V7
374 select CPU_V7
379 select CPU_32v6
380 select CPU_ABRT_EV6
381 select CPU_CACHE_V6
382 select CPU_CACHE_VIPT
383 select CPU_COPY_V6 if MMU
384 select CPU_CP15_MMU
385 select CPU_HAS_ASID if MMU
386 select CPU_PABRT_V6
387 select CPU_THUMB_CAPABLE
388 select CPU_TLB_V6 if MMU
389 select SMP_ON_UP if SMP
394 select CPU_32v6
395 select CPU_32v6K
396 select CPU_ABRT_EV6
397 select CPU_CACHE_V6
398 select CPU_CACHE_VIPT
399 select CPU_COPY_V6 if MMU
400 select CPU_CP15_MMU
401 select CPU_HAS_ASID if MMU
402 select CPU_PABRT_V6
403 select CPU_THUMB_CAPABLE
404 select CPU_TLB_V6 if MMU
409 select CPU_32v6K
410 select CPU_32v7
411 select CPU_ABRT_EV7
412 select CPU_CACHE_V7
413 select CPU_CACHE_VIPT
414 select CPU_COPY_V6 if MMU
415 select CPU_CP15_MMU if MMU
416 select CPU_CP15_MPU if !MMU
417 select CPU_HAS_ASID if MMU
418 select CPU_PABRT_V7
419 select CPU_SPECTRE if MMU
420 select CPU_THUMB_CAPABLE
421 select CPU_TLB_V7 if MMU
426 select CPU_32v7M
427 select CPU_ABRT_NOMMU
428 select CPU_CACHE_V7M
429 select CPU_CACHE_NOP
430 select CPU_PABRT_LEGACY
431 select CPU_THUMBONLY
435 select CPU_THUMB_CAPABLE
439 Select this if your CPU doesn't support the 32 bit ARM instructions.
444 Select this if your CPU can support Thumb mode.
450 select CPU_USE_DOMAINS if MMU
451 select NEED_KUSER_HELPERS
452 select TLS_REG_EMUL if SMP || !MMU
453 select CPU_NO_EFFICIENT_FFS
457 select CPU_USE_DOMAINS if MMU
458 select NEED_KUSER_HELPERS
459 select TLS_REG_EMUL if SMP || !MMU
460 select CPU_NO_EFFICIENT_FFS
464 select CPU_USE_DOMAINS if MMU
465 select NEED_KUSER_HELPERS
466 select TLS_REG_EMUL if SMP || !MMU
467 select CPU_NO_EFFICIENT_FFS
471 select CPU_USE_DOMAINS if MMU
472 select NEED_KUSER_HELPERS
473 select TLS_REG_EMUL if SMP || !MMU
477 select TLS_REG_EMUL if !CPU_32v6K && !MMU
620 select CPU_CP15
626 select CPU_CP15
667 select PHYS_ADDR_T_64BIT
668 select SWIOTLB
722 select HAVE_PROC_CPU if PROC_FS
785 bool "Select the High exception vector"
787 Say Y here to select high exception vector(0xFFFF0000~).
789 design in nommu mode. If your platform needs to select
852 select GENERIC_CPU_VULNERABILITIES
885 select NEED_KUSER_HELPERS
927 select HAVE_GENERIC_VDSO
928 select GENERIC_TIME_VSYSCALL
929 select GENERIC_VDSO_32
930 select GENERIC_GETTIMEOFDAY
946 select ARM_HEAVY_MB
963 select OUTER_CACHE
984 support to be present should select CACHE_L2X0 directly
991 select OUTER_CACHE
992 select OUTER_CACHE_SYNC
1059 select OUTER_CACHE
1067 select ARM_L1_CACHE_SHIFT_7
1068 select OUTER_CACHE
1069 select OUTER_CACHE_SYNC
1078 select OUTER_CACHE