Lines Matching +full:tegra +full:- +full:pmc

1 // SPDX-License-Identifier: GPL-2.0-only
3 * CPU complex suspend & resume functions for Tegra SoCs
5 * Copyright (c) 2009-2012, NVIDIA Corporation. All rights reserved.
8 #include <linux/clk/tegra.h>
21 #include <soc/tegra/flowctrl.h>
22 #include <soc/tegra/fuse.h>
23 #include <soc/tegra/pm.h>
24 #include <soc/tegra/pmc.h>
29 #include <asm/proc-fns.h>
141 if (tegra_cpu_car_ops->rail_off_ready && in tegra_sleep_cpu()
143 return -EBUSY; in tegra_sleep_cpu()
148 * MMU-on if cache maintenance is done via Trusted Foundations in tegra_sleep_cpu()
150 * if any of secondary CPU's is online and this is the LP2-idle in tegra_sleep_cpu()
151 * code-path only for Tegra20/30. in tegra_sleep_cpu()
162 * 2) Disable D-cache. This need to be taken into account in in tegra_sleep_cpu()
164 * shall avoid the re-disable. in tegra_sleep_cpu()
206 err = cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, &tegra_sleep_cpu); in tegra_pm_enter_lp2()
209 * Resume L2 cache if it wasn't re-enabled early during resume, in tegra_pm_enter_lp2()
210 * which is the case for Tegra30 that has to re-enable the cache in tegra_pm_enter_lp2()
212 * hence re-enabling is a no-op. This is always a no-op on Tegra114+. in tegra_pm_enter_lp2()
228 * The Tegra devices support suspending to LP1 or lower currently. in tegra_pm_validate_suspend_mode()
239 * Cache have to be disabled with MMU-on if cache maintenance is done in tegra_sleep_core()
240 * via Trusted Foundations firmware. This is a no-op on Tegra114+. in tegra_sleep_core()
259 * Hooking the address of LP1 reset vector and SDRAM self-refresh code in
286 iram_save_size = tegra_lp1_iram.end_addr - tegra_lp1_iram.start_addr; in tegra_lp1_iram_hook()
352 return -EINVAL; in tegra_suspend_enter()
372 cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, tegra_sleep_func); in tegra_suspend_enter()
375 * Resume L2 cache if it wasn't re-enabled early during resume, in tegra_suspend_enter()
376 * which is the case for Tegra30 that has to re-enable the cache in tegra_suspend_enter()
378 * hence re-enabling is a no-op. in tegra_suspend_enter()
418 "self-refresh -- LP0/LP1 unavailable\n", in tegra_pm_init_suspend()
451 return -EINVAL; in tegra_pm_park_secondary_cpu()