Lines Matching +full:0 +full:x0120
28 #define RK3288_PMU_WAKEUP_CFG0 0x00
29 #define RK3288_PMU_WAKEUP_CFG1 0x04
30 #define RK3288_PMU_PWRMODE_CON 0x18
31 #define RK3288_PMU_OSC_CNT 0x20
32 #define RK3288_PMU_PLL_CNT 0x24
33 #define RK3288_PMU_STABL_CNT 0x28
34 #define RK3288_PMU_DDR0IO_PWRON_CNT 0x2c
35 #define RK3288_PMU_DDR1IO_PWRON_CNT 0x30
36 #define RK3288_PMU_CORE_PWRDWN_CNT 0x34
37 #define RK3288_PMU_CORE_PWRUP_CNT 0x38
38 #define RK3288_PMU_GPU_PWRDWN_CNT 0x3c
39 #define RK3288_PMU_GPU_PWRUP_CNT 0x40
40 #define RK3288_PMU_WAKEUP_RST_CLR_CNT 0x44
41 #define RK3288_PMU_PWRMODE_CON1 0x90
43 #define RK3288_SGRF_SOC_CON0 (0x0000)
44 #define RK3288_SGRF_FAST_BOOT_ADDR (0x0120)
50 #define RK3288_SGRF_CPU_CON0 (0x40)
51 #define SGRF_DAPDEVICEEN BIT(0)
55 #define PMU_ARMINT_WAKEUP_EN BIT(0)
59 PMU_PWR_MODE_EN = 0,
85 PMU_CLR_BUS = 0,