Lines Matching +full:0 +full:x5c000000

51 #define NDCR			(*(volatile u32 __iomem*)(NAND_VIRT + 0))
61 #define ISRAM_START 0x5c000000
77 void (*fn)(unsigned int) = (void __force *)(sram + 0x8000); in pxa3xx_cpu_standby()
79 memcpy_toio(sram + 0x8000, pm_enter_standby_start, in pxa3xx_cpu_standby()
82 AD2D0SR = ~0; in pxa3xx_cpu_standby()
83 AD2D1SR = ~0; in pxa3xx_cpu_standby()
85 AD2D1ER = 0; in pxa3xx_cpu_standby()
93 AD2D0ER = 0; in pxa3xx_cpu_standby()
94 AD2D1ER = 0; in pxa3xx_cpu_standby()
102 * 0x5c014000 for the moment.
106 volatile unsigned long *p = (volatile void *)0xc0000000; in pxa3xx_cpu_pm_suspend()
115 asm volatile("mrrc p0, 0, %Q0, %R0, c0" : "=r" (acc0)); in pxa3xx_cpu_pm_suspend()
121 CKENB |= 1 << (CKEN_HSIO2 & 0x1f); in pxa3xx_cpu_pm_suspend()
124 AD3SR = ~0; in pxa3xx_cpu_pm_suspend()
132 PSPR = 0x5c014000; in pxa3xx_cpu_pm_suspend()
137 cpu_suspend(0, pxa3xx_finish_suspend); in pxa3xx_cpu_pm_suspend()
141 AD3ER = 0; in pxa3xx_cpu_pm_suspend()
148 asm volatile("mcrr p0, 0, %Q0, %R0, c0" :: "r" (acc0)); in pxa3xx_cpu_pm_suspend()
158 if (wakeup_src == 0) { in pxa3xx_cpu_pm_enter()
204 AD1D0ER = 0; in pxa3xx_init_pm()
205 AD2D0ER = 0; in pxa3xx_init_pm()
206 AD2D1ER = 0; in pxa3xx_init_pm()
207 AD3ER = 0; in pxa3xx_init_pm()
214 unsigned long flags, mask = 0; in pxa3xx_set_wake()
298 return 0; in pxa3xx_set_wake()
330 return 0; in pxa_set_ext_wakeup_type()
359 __asm__ __volatile__("mrc p15, 0, %0, c15, c1, 0\n": "=r"(value)); in __pxa3xx_init_irq()
361 __asm__ __volatile__("mcr p15, 0, %0, c15, c1, 0\n": :"r"(value)); in __pxa3xx_init_irq()
373 return 0; in pxa3xx_dt_init_irq()
400 int ret = 0; in pxa3xx_init()