Lines Matching +full:0 +full:x40700000

52 	[0] = {
53 		.start	= 0x41100000,
54 		.end	= 0x41100fff,
69 		.id		= 0,  in pxa_set_mci_info()
74 		.dma_mask	= 0xffffffffUL,  in pxa_set_mci_info()
91 	[0] = {
92 		.start	= 0x40600000,
93 		.end	= 0x4060ffff,
103 static u64 udc_dma_mask = ~(u32)0;
128 	[0] = {
129 		.start	= 0x44000000,
130 		.end	= 0x4400ffff,
140 static u64 fb_dma_mask = ~(u64)0;
147 		.coherent_dma_mask = 0xffffffff,
161 		.start	= 0x40100000,
162 		.end	= 0x40100023,
173 	.id		= 0,
185 		.start	= 0x40200000,
186 		.end	= 0x40200023,
209 		.start	= 0x40700000,
210 		.end	= 0x40700023,
233 		.start	= 0x41600000,
234 		.end	= 0x4160002F,
260 		.start	= 0x40301680,
261 		.end	= 0x403016a3,
272 	.id		= 0,
285 		.start	= 0x40f00180,
286 		.end	= 0x40f001a3,
305 		.start	= 0x40400000,
306 		.end	= 0x40400083,
324 	.id		= 0,
348 	[0] = {
349 		.start  = 0x40900000,
350 		.end	= 0x40900000 + 0x3b,
384 	[0] = {
385 		.start	= 0x40b00000,
386 		.end	= 0x40b0000f,
393 	.id		= 0,
399 	[0] = {
400 		.start	= 0x40c00000,
401 		.end	= 0x40c0000f,
416 	[0] = {
417 		.start	= 0x41000000,
418 		.end	= 0x4100001f,
430 	.id		= 0,
442 	[0] = {
443 		.start	= 0x41400000,
444 		.end	= 0x4140002f,
468 	[0] = {
469 		.start	= 0x41500000,
470 		.end	= 0x4150002f,
497 	[0] = {
498 		.start  = 0x4C000000,
499 		.end    = 0x4C00ff6f,
530 	[0] = {
531 		.start	= 0x41000000,
532 		.end	= 0x4100003f,
544 	.id		= 0,
556 	[0] = {
557 		.start	= 0x41700000,
558 		.end	= 0x4170003f,
582 	[0] = {
583 		.start	= 0x41900000,
584 		.end	= 0x4190003f,
606 	[0] = {
607 		.start	= 0x40b00000,
608 		.end	= 0x40b0001f,
615 	.id		= 0,
621 	[0] = {
622 		.start	= 0x40c00000,
623 		.end	= 0x40c0001f,
643 		.start	= 0x40e00000,
644 		.end	= 0x40e0ffff,
665 	.irq_base	= PXA_GPIO_TO_IRQ(0),
691 	[0] = {
692 		.start	= 0x40000000,
693 		.end	= 0x4000ffff,
703 static u64 pxadma_dmamask = 0xffffffffUL;
707 	.id		= 0,
710 		.coherent_dma_mask = 0xffffffff,