Lines Matching +full:exported +full:- +full:sram

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Karthik Dasu <karthik-dp@ti.com>
9 * Richard Woodruff <r-woodruff2@ti.com>
20 #include "sram.h"
57 * with non-Thumb-2-capable firmware.
86 .arch armv7-a
89 stmfd sp!, {r4 - r11, lr} @ save registers on stack
103 ldmfd sp!, {r4 - r11, pc}
115 * omap34xx_cpu_suspend() - This bit of code saves the CPU context if needed
121 * - only the minimum set of functions gets copied to internal SRAM at boot
122 * and after wake-up from OFF mode, cf. omap_push_sram_idle. The function
123 * pointers in SDRAM or SRAM are called depending on the desired low power
125 * - when the OMAP wakes up it continues at different execution points
126 * depending on the low power mode (non-OFF vs OFF modes),
131 stmfd sp!, {r4 - r11, lr} @ save registers on stack
135 * 0 - No context lost
136 * 1 - Only L1 and logic lost
137 * 2 - Only L2 lost (Even L1 is retained we clean it along with L2)
138 * 3 - Both L1 and L2 lost and logic lost
143 * For non-OFF modes: jump to the WFI code in SRAM (omap3_do_wfi_sram)
148 bxeq r5 @ jump to the WFI code in SRAM
155 * - reuse that code is better
156 * - it executes in a cached space so is faster than refetch per-block
157 * - should be faster and will change with kernel
158 * - 'might' have to copy address, load and jump to it
178 * necessary exported flush API is used here. Doing clean
197 * Includes the resume path for non-OFF modes
199 * This code gets copied to internal SRAM and is accessible
200 * from both SDRAM and SRAM:
201 * - executed from SRAM for non-off modes (omap3_do_wfi_sram),
202 * - executed from SDRAM for OFF mode (omap3_do_wfi).
224 * == Resume path for non-OFF modes ==
242 * Only used at return from non-OFF mode. For OFF
303 /* Re-enable C-bit if needed */
312 * == Exit point from non-OFF modes ==
315 ldmfd sp!, {r4 - r11, pc} @ restore regs and return
328 .word . - omap3_do_wfi
348 * Also the SRAM content has been cleared.
363 subs r2, r2, #0x1 @ num_words--
451 .long l2_inv_api_params - .
471 cmp r1, #0x1 @ Test if L2 re-enable needed on 3630
474 orr r1, r1, #2 @ re-enable L2 cache
500 .long l2dis_3630 - .
518 * Copied to and run from SRAM in order to reconfigure the SDRC parameters.
569 .word . - es3_sdrc_fix